• Maciej W. Rozycki's avatar
    MIPS: tlb-r3k: Also invalidate wired TLB entries on boot · dbfbf60f
    Maciej W. Rozycki authored
    Most R3k processor implementations have their 8 first TLB entries fixed
    as wired, so we always skip them in TLB invalidation.  That however
    means any leftover entries present there at boot will stay throughout
    the life of the kernel, unless replaced with new ones.
    
    So rename `local_flush_tlb_all' to `local_flush_tlb_from' and make it
    accept the TLB entry to start from.  Then use 0 initially at bootstrap,
    and the first regular entry later on, bypassing any wired entries.
    Wrap the latter arrangement into a new `local_flush_tlb_all' entry
    point.
    
    There is no need to disable interrupts in the call made from `tlb_init'
    because it's made before the interrupt subsystem has been initialised;
    this is also true for secondary processors, should we ever support R3k
    SMP.  So move this piece of code to new `local_flush_tlb_all'.
    Signed-off-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
    Cc: James Hogan <james.hogan@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/10194/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    dbfbf60f
tlb-r3k.c 6.41 KB