• Tokunori Ikegami's avatar
    MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum · 2a027b47
    Tokunori Ikegami authored
    The erratum and workaround are described by BCM5300X-ES300-RDS.pdf as
    below.
    
      R10: PCIe Transactions Periodically Fail
    
        Description: The BCM5300X PCIe does not maintain transaction ordering.
                     This may cause PCIe transaction failure.
        Fix Comment: Add a dummy PCIe configuration read after a PCIe
                     configuration write to ensure PCIe configuration access
                     ordering. Set ES bit of CP0 configu7 register to enable
                     sync function so that the sync instruction is functional.
        Resolution:  hndpci.c: extpci_write_config()
                     hndmips.c: si_mips_init()
                     mipsinc.h CONF7_ES
    
    This is fixed by the CFE MIPS bcmsi chipset driver also for BCM47XX.
    Also the dummy PCIe configuration read is already implemented in the
    Linux BCMA driver.
    
    Enable ExternalSync in Config7 when CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
    too so that the sync instruction is externalised.
    Signed-off-by: default avatarTokunori Ikegami <ikegami@allied-telesis.co.jp>
    Reviewed-by: default avatarPaul Burton <paul.burton@mips.com>
    Acked-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
    Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
    Cc: Rafał Miłecki <zajec5@gmail.com>
    Cc: linux-mips@linux-mips.org
    Cc: stable@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/19461/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
    2a027b47
setup.c 7.01 KB