• James Hogan's avatar
    MIPS: KVM: Make entry code MIPS64 friendly · e41637d8
    James Hogan authored
    The MIPS KVM entry code (originally kvm_locore.S, later locore.S, and
    now entry.c) has never quite been right when built for 64-bit, using
    32-bit instructions when 64-bit instructions were needed for handling
    64-bit registers and pointers. Fix several cases of this now.
    
    The changes roughly fall into the following categories.
    
    - COP0 scratch registers contain guest register values and the VCPU
      pointer, and are themselves full width. Similarly CP0_EPC and
      CP0_BadVAddr registers are full width (even though technically we
      don't support 64-bit guest address spaces with trap & emulate KVM).
      Use MFC0/MTC0 for accessing them.
    
    - Handling of stack pointers and the VCPU pointer must match the pointer
      size of the kernel ABI (always o32 or n64), so use ADDIU.
    
    - The CPU number in thread_info, and the guest_{user,kernel}_asid arrays
      in kvm_vcpu_arch are all 32 bit integers, so use lw (instead of LW) to
      load them.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: "Radim Krčmář" <rkrcmar@redhat.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: linux-mips@linux-mips.org
    Cc: kvm@vger.kernel.org
    Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
    e41637d8
entry.c 18.5 KB