• Christoph Hellwig's avatar
    riscv: add swiotlb support · 10314e09
    Christoph Hellwig authored
    All RISC-V platforms today lack an IOMMU. However, legacy PCI devices
    sometimes require DMA-memory to be in the low 32 bits.  To make this work,
    we enable the software-based bounce buffers from swiotlb.  They only impose
    overhead when the device in question cannot address the full 64-bit address
    space, so a perfect fit.
    
    This patch assumes that DMA is coherent with the processor and the PCI
    bus.  It also assumes that the processor and devices share a common
    address space. This is true for all RISC-V platforms so far.
    
    [changelog stolen from an earlier patch by Palmer Dabbelt that did the
     more complicated swiotlb wireup before the recent consolidation]
    Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
    Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
    10314e09
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