• Stephen Boyd's avatar
    clk: qcom: Specify LE device endianness · 329cabce
    Stephen Boyd authored
    All these clock controllers are little endian devices, but so far
    we've been relying on the regmap mmio bus handling this for us
    without explicitly stating that fact. After commit 4a98da2164cf
    (regmap-mmio: Use native endianness for read/write, 2015-10-29),
    the regmap mmio bus will read/write with the __raw_*() IO
    accessors, instead of using the readl/writel() APIs that do
    proper byte swapping for little endian devices.
    
    So if we're running on a big endian processor and haven't
    specified the endianness explicitly in the regmap config or in
    DT, we're going to switch from doing little endian byte swapping
    to big endian accesses without byte swapping, leading to some
    confusing results. On my apq8074 dragonboard, this causes the
    device to fail to boot as we access the clock controller with
    big endian IO accesses even though the device is little endian.
    
    Specify the endianness explicitly so that the regmap core
    properly byte swaps the accesses for us.
    Reported-by: default avatarKevin Hilman <khilman@linaro.org>
    Tested-by: default avatarTyler Baker <tyler.baker@linaro.org>
    Tested-by: default avatarKevin Hilman <khilman@linaro.org>
    Cc: Simon Arlott <simon@fire.lp0.eu>
    Cc: Mark Brown <broonie@kernel.org>
    Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
    329cabce
mmcc-apq8084.c 77.6 KB