-
Jungseung Lee authored
The mode bits on control register 0 are in a different order compared to the spi mode define values. Thus, in the current code, it fails to set the correct SPI mode selection. Fix it. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Link: https://lore.kernel.org/r/20200402121022.9976-1-js07.lee@samsung.comSigned-off-by: Mark Brown <broonie@kernel.org>
61249ce0