• Daniel Vetter's avatar
    drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo · f7bacf19
    Daniel Vetter authored
    Our handling of the crtc timing computation has been nicely
    cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over
    the place. But with
    
    commit f9bef081
    Author: Daniel Vetter <daniel.vetter@ffwll.ch>
    Date:   Sun Apr 15 19:53:19 2012 +0200
    
        drm/i915: don't clobber the special upscaling lvds timings
    
    and
    
    commit ca9bfa7e
    Author: Daniel Vetter <daniel.vetter@ffwll.ch>
    Date:   Sat Jan 28 14:49:20 2012 +0100
    
        drm/i915: fixup interlaced vertical timings confusion, part 1
    
    we now only set the crtc timing fields in the encoder->mode_fixup
    (lvds only) and in crtc->mode_fixup (for everyone else). And since
    
    commit 75c13993
    Author: Daniel Vetter <daniel.vetter@ffwll.ch>
    Date:   Sat Jan 28 23:48:46 2012 +0100
    
        drm/i915: fixup overlay checks for interlaced modes
    
    the only places we actually need the crtc timings is in the mode_set
    function.
    
    I guess the idea of the drm core is that every time it creates a drm
    mode, it also sets the timings. But afaics it never uses them, safe
    for the precise vblank timestamp code (but that can only run on active
    modes, i.e.  after our mode_fixup functions have been called). The
    problem is that drm core always sets CRTC_INTERLACE_HALVE_V, so the
    timings are pretty much bogus for us anyway (at least with interlaced
    support).
    
    So I guess it's the drivers job that every active modes needs to have
    crtc timings that suits it, and with these patches we should have
    that. drm core doesn't seem to care about modes that just get passed
    around. Hence we can now safely rip out all the remaining calls to
    set_crtcinfo left in the driver and clean up this confusion.
    Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    f7bacf19
intel_overlay.c 41.2 KB