• Daniel Vetter's avatar
    drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv · ff9ce46e
    Daniel Vetter authored
    The current code is rather ... ugly. The only thing it managed to pull
    off is getting 6bpc on DP working on g4x. Then someone added another
    custom hack for 6bpc eDP on vlv. Fix up this entire mess by properly
    implementing the PIPECONF-based dither/bpc controls on g4x/vlv.
    
    Note that compared to pch based platforms g4x/vlv don't support 12bpc
    modes. g4x is already caught, extend the check for vlv.
    
    The other fixup is to restrict the lvds-specific dithering to early
    gen4 devices - g4x should use the pipeconf dither controls. Note that
    on gen2/3 the dither control is in the panel fitter even.
    
    v2: Don't enable dithering when the pipe is in 10 bpc mode. Quoting
    from Bspec "PIPEACONF - Pipe A Configuration Register, bit 4":
    
    "Programming note: Dithering should only be enabled for 8 bpc or 6
    bpc."
    
    v3: Actually drop the old ugly dither code.
    
    v4: Explain in a short comment why g4x/vlv shouldn't dither for 30 bpp
    pipes (Jesse).
    
    v5: Also clear the dither type correctly as spotted by Ville.
    
    v6: As Ville pointed out we need to indeed set the dithering both in
    the pipeconf register (for DP outputs) and in the LVDS port register
    (for LVDS ouputs). Otherwise LVDS panel will not get properly
    dithered. The old patch got away with this since it forgot to clear
    the LVDS dither bit ...
    
    v7: Remove redundant BPC_MASK clearing, spotted by Ville.
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    ff9ce46e
intel_display.c 260 KB