Commit 01af9507 authored by Kumar Gala's avatar Kumar Gala

powerpc/85xx: Add P2020DS board support

The P2020 is a dual e500v2 core based SOC with:
* 3 PCIe controllers
* 2 General purpose DMA controllers
* 2 sRIO controllers
* 3 eTSECS
* USB 2.0
* SDHC
* SPI, I2C, DUART
* enhanced localbus
* and optional Security (P2020E) security w/XOR acceleration

The p2020 DS reference board is pretty similar to the existing MPC85xx
DS boards and has a ULI 1575 connected on one of the PCIe controllers.
Signed-off-by: default avatarTed Peters <Ted.Peters@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 40461472
This diff is collapsed.
......@@ -163,7 +163,8 @@ static void __init mpc85xx_ds_setup_arch(void)
#ifdef CONFIG_PCI
for_each_node_by_type(np, "pci") {
if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
of_device_is_compatible(np, "fsl,p2020-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
if ((rsrc.start & 0xfffff) == primary_phb_addr)
......@@ -195,9 +196,9 @@ static int __init mpc8544_ds_probe(void)
primary_phb_addr = 0xb000;
#endif
return 1;
} else {
return 0;
}
return 0;
}
static struct of_device_id __initdata mpc85xxds_ids[] = {
......@@ -214,6 +215,7 @@ static int __init mpc85xxds_publish_devices(void)
}
machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
/*
* Called very early, device-tree isn't unflattened
......@@ -227,9 +229,26 @@ static int __init mpc8572_ds_probe(void)
primary_phb_addr = 0x8000;
#endif
return 1;
} else {
return 0;
}
return 0;
}
/*
* Called very early, device-tree isn't unflattened
*/
static int __init p2020_ds_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
#ifdef CONFIG_PCI
primary_phb_addr = 0x9000;
#endif
return 1;
}
return 0;
}
define_machine(mpc8544_ds) {
......@@ -259,3 +278,17 @@ define_machine(mpc8572_ds) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
define_machine(p2020_ds) {
.name = "P2020 DS",
.probe = p2020_ds_probe,
.setup_arch = mpc85xx_ds_setup_arch,
.init_IRQ = mpc85xx_ds_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
......@@ -55,6 +55,7 @@ static inline bool is_quirk_valid(void)
{
return (machine_is(mpc86xx_hpcn) ||
machine_is(mpc8544_ds) ||
machine_is(p2020_ds) ||
machine_is(mpc8572_ds));
}
......
......@@ -302,6 +302,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header);
#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
......
......@@ -2288,6 +2288,8 @@
#define PCI_DEVICE_ID_MPC8572 0x0041
#define PCI_DEVICE_ID_MPC8536E 0x0050
#define PCI_DEVICE_ID_MPC8536 0x0051
#define PCI_DEVICE_ID_P2020E 0x0070
#define PCI_DEVICE_ID_P2020 0x0071
#define PCI_DEVICE_ID_MPC8641 0x7010
#define PCI_DEVICE_ID_MPC8641D 0x7011
#define PCI_DEVICE_ID_MPC8610 0x7018
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment