drm/amd/display: Refactor dcn10_dpp_cm_helper to dcn10_cm_common

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dcn10/Makefile

@@ -4,7 +4,7 @@
 DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \
 		dcn10_dpp.o dcn10_opp.o dcn10_timing_generator.o \
 		dcn10_mem_input.o dcn10_mpc.o \
-		dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_dpp_cm_helper.o
+		dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o
 
 AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))
 

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c → drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c

@@ -26,7 +26,7 @@
 #include "reg_helper.h"
 #include "dcn10_dpp.h"
 
-#include "dcn10_dpp_cm_helper.h"
+#include "dcn10_cm_common.h"
 
 #define REG(reg) reg
 

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h → drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h

@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef __DAL_DPP_DCN10_CM_HELPER_H__
-#define __DAL_DPP_DCN10_CM_HELPER_H__
+#ifndef __DAL_DCN10_CM_COMMON_H__
+#define __DAL_DCN10_CM_COMMON_H__
 
 #define TF_HELPER_REG_FIELD_LIST(type) \
 	type exp_region0_lut_offset; \

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

@@ -29,8 +29,8 @@
 
 #include "reg_helper.h"
 #include "dcn10_dpp.h"
-#include "dcn10_dpp_cm_helper.h"
 #include "basics/conversion.h"
+#include "dcn10_cm_common.h"
 
 #define NUM_PHASES    64
 #define HORZ_MAX_TAPS 8