Commit 06c14f5c authored by Dave Airlie's avatar Dave Airlie

Merge tag 'mediatek-drm-next-5.10' of...

Merge tag 'mediatek-drm-next-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

Mediatek DRM Next for Linux 5.10

1. Move Mediatek HDMI PHY driver from DRM folder to PHY folder
2. Convert mtk-dpi to drm_bridge API
3. Disable tmds on mt2701
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200914231227.30500-1-chunkuang.hu@kernel.org
parents 200a2186 09e872d5
...@@ -43,7 +43,7 @@ Required properties (all function blocks): ...@@ -43,7 +43,7 @@ Required properties (all function blocks):
"mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
"mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-mutex" - display mutex
"mediatek,<chip>-disp-od" - overdrive "mediatek,<chip>-disp-od" - overdrive
the supported chips are mt2701, mt2712 and mt8173. the supported chips are mt2701, mt7623, mt2712 and mt8173.
- reg: Physical base address and length of the function block register space - reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for - interrupts: The interrupt signal from the function block (required, except for
merge and split function blocks). merge and split function blocks).
......
...@@ -7,7 +7,7 @@ output bus. ...@@ -7,7 +7,7 @@ output bus.
Required properties: Required properties:
- compatible: "mediatek,<chip>-dpi" - compatible: "mediatek,<chip>-dpi"
the supported chips are mt2701 , mt8173 and mt8183. the supported chips are mt2701, mt7623, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block. - interrupts: The interrupt signal from the function block.
- clocks: device clocks - clocks: device clocks
......
...@@ -7,7 +7,7 @@ channel output. ...@@ -7,7 +7,7 @@ channel output.
Required properties: Required properties:
- compatible: "mediatek,<chip>-dsi" - compatible: "mediatek,<chip>-dsi"
the supported chips are mt2701, mt8173 and mt8183. - the supported chips are mt2701, mt7623, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block. - interrupts: The interrupt signal from the function block.
- clocks: device clocks - clocks: device clocks
...@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. ...@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
Required properties: Required properties:
- compatible: "mediatek,<chip>-mipi-tx" - compatible: "mediatek,<chip>-mipi-tx"
the supported chips are mt2701, mt8173 and mt8183. - the supported chips are mt2701, 7623, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock - clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder - clock-output-names: name of the output clock line to the DSI encoder
......
...@@ -6,6 +6,7 @@ its parallel input. ...@@ -6,6 +6,7 @@ its parallel input.
Required properties: Required properties:
- compatible: Should be "mediatek,<chip>-hdmi". - compatible: Should be "mediatek,<chip>-hdmi".
- the supported chips are mt2701, mt7623 and mt8173
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block. - interrupts: The interrupt signal from the function block.
- clocks: device clocks - clocks: device clocks
...@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. ...@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication.
Required properties: Required properties:
- compatible: Should be "mediatek,<chip>-cec" - compatible: Should be "mediatek,<chip>-cec"
- the supported chips are mt7623 and mt8173
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block. - interrupts: The interrupt signal from the function block.
- clocks: device clock - clocks: device clock
...@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. ...@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices.
Required properties: Required properties:
- compatible: Should be "mediatek,<chip>-hdmi-ddc" - compatible: Should be "mediatek,<chip>-hdmi-ddc"
- the supported chips are mt7623 and mt8173
- reg: Physical base address and length of the controller's registers - reg: Physical base address and length of the controller's registers
- clocks: device clock - clocks: device clock
- clock-names: Should be "ddc-i2c". - clock-names: Should be "ddc-i2c".
...@@ -56,6 +59,7 @@ output and drives the HDMI pads. ...@@ -56,6 +59,7 @@ output and drives the HDMI pads.
Required properties: Required properties:
- compatible: "mediatek,<chip>-hdmi-phy" - compatible: "mediatek,<chip>-hdmi-phy"
- the supported chips are mt2701, mt7623 and mt8173
- reg: Physical base address and length of the module's registers - reg: Physical base address and length of the module's registers
- clocks: PLL reference clock - clocks: PLL reference clock
- clock-names: must contain "pll_ref" - clock-names: must contain "pll_ref"
......
...@@ -5827,6 +5827,7 @@ L: dri-devel@lists.freedesktop.org ...@@ -5827,6 +5827,7 @@ L: dri-devel@lists.freedesktop.org
S: Supported S: Supported
F: Documentation/devicetree/bindings/display/mediatek/ F: Documentation/devicetree/bindings/display/mediatek/
F: drivers/gpu/drm/mediatek/ F: drivers/gpu/drm/mediatek/
F: drivers/phy/mediatek/phy-mtk-hdmi*
DRM DRIVERS FOR NVIDIA TEGRA DRM DRIVERS FOR NVIDIA TEGRA
M: Thierry Reding <thierry.reding@gmail.com> M: Thierry Reding <thierry.reding@gmail.com>
......
...@@ -24,6 +24,6 @@ config DRM_MEDIATEK_HDMI ...@@ -24,6 +24,6 @@ config DRM_MEDIATEK_HDMI
tristate "DRM HDMI Support for Mediatek SoCs" tristate "DRM HDMI Support for Mediatek SoCs"
depends on DRM_MEDIATEK depends on DRM_MEDIATEK
select SND_SOC_HDMI_CODEC if SND_SOC select SND_SOC_HDMI_CODEC if SND_SOC
select GENERIC_PHY select PHY_MTK_HDMI
help help
DRM/KMS HDMI driver for Mediatek SoCs DRM/KMS HDMI driver for Mediatek SoCs
...@@ -19,9 +19,6 @@ obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o ...@@ -19,9 +19,6 @@ obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
mediatek-drm-hdmi-objs := mtk_cec.o \ mediatek-drm-hdmi-objs := mtk_cec.o \
mtk_hdmi.o \ mtk_hdmi.o \
mtk_hdmi_ddc.o \ mtk_hdmi_ddc.o
mtk_mt2701_hdmi_phy.o \
mtk_mt8173_hdmi_phy.o \
mtk_hdmi_phy.o
obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
...@@ -64,7 +64,8 @@ enum mtk_dpi_out_color_format { ...@@ -64,7 +64,8 @@ enum mtk_dpi_out_color_format {
struct mtk_dpi { struct mtk_dpi {
struct mtk_ddp_comp ddp_comp; struct mtk_ddp_comp ddp_comp;
struct drm_encoder encoder; struct drm_encoder encoder;
struct drm_bridge *bridge; struct drm_bridge bridge;
struct drm_bridge *next_bridge;
void __iomem *regs; void __iomem *regs;
struct device *dev; struct device *dev;
struct clk *engine_clk; struct clk *engine_clk;
...@@ -83,9 +84,9 @@ struct mtk_dpi { ...@@ -83,9 +84,9 @@ struct mtk_dpi {
int refcount; int refcount;
}; };
static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e) static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
{ {
return container_of(e, struct mtk_dpi, encoder); return container_of(b, struct mtk_dpi, bridge);
} }
enum mtk_dpi_polarity { enum mtk_dpi_polarity {
...@@ -521,50 +522,53 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, ...@@ -521,50 +522,53 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
return 0; return 0;
} }
static bool mtk_dpi_encoder_mode_fixup(struct drm_encoder *encoder, static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{ {
return true; drm_encoder_cleanup(encoder);
} }
static void mtk_dpi_encoder_mode_set(struct drm_encoder *encoder, static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
struct drm_display_mode *mode, .destroy = mtk_dpi_encoder_destroy,
struct drm_display_mode *adjusted_mode) };
static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,
enum drm_bridge_attach_flags flags)
{ {
struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder); struct mtk_dpi *dpi = bridge_to_dpi(bridge);
return drm_bridge_attach(bridge->encoder, dpi->next_bridge,
&dpi->bridge, flags);
}
static void mtk_dpi_bridge_mode_set(struct drm_bridge *bridge,
const struct drm_display_mode *mode,
const struct drm_display_mode *adjusted_mode)
{
struct mtk_dpi *dpi = bridge_to_dpi(bridge);
drm_mode_copy(&dpi->mode, adjusted_mode); drm_mode_copy(&dpi->mode, adjusted_mode);
} }
static void mtk_dpi_encoder_disable(struct drm_encoder *encoder) static void mtk_dpi_bridge_disable(struct drm_bridge *bridge)
{ {
struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder); struct mtk_dpi *dpi = bridge_to_dpi(bridge);
mtk_dpi_power_off(dpi); mtk_dpi_power_off(dpi);
} }
static void mtk_dpi_encoder_enable(struct drm_encoder *encoder) static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
{ {
struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder); struct mtk_dpi *dpi = bridge_to_dpi(bridge);
mtk_dpi_power_on(dpi); mtk_dpi_power_on(dpi);
mtk_dpi_set_display_mode(dpi, &dpi->mode); mtk_dpi_set_display_mode(dpi, &dpi->mode);
} }
static int mtk_dpi_atomic_check(struct drm_encoder *encoder, static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
struct drm_crtc_state *crtc_state, .attach = mtk_dpi_bridge_attach,
struct drm_connector_state *conn_state) .mode_set = mtk_dpi_bridge_mode_set,
{ .disable = mtk_dpi_bridge_disable,
return 0; .enable = mtk_dpi_bridge_enable,
}
static const struct drm_encoder_helper_funcs mtk_dpi_encoder_helper_funcs = {
.mode_fixup = mtk_dpi_encoder_mode_fixup,
.mode_set = mtk_dpi_encoder_mode_set,
.disable = mtk_dpi_encoder_disable,
.enable = mtk_dpi_encoder_enable,
.atomic_check = mtk_dpi_atomic_check,
}; };
static void mtk_dpi_start(struct mtk_ddp_comp *comp) static void mtk_dpi_start(struct mtk_ddp_comp *comp)
...@@ -605,12 +609,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) ...@@ -605,12 +609,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
dev_err(dev, "Failed to initialize decoder: %d\n", ret); dev_err(dev, "Failed to initialize decoder: %d\n", ret);
goto err_unregister; goto err_unregister;
} }
drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
/* Currently DPI0 is fixed to be driven by OVL1 */ dpi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
dpi->encoder.possible_crtcs = BIT(1);
ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL, 0); ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL, 0);
if (ret) { if (ret) {
dev_err(dev, "Failed to attach bridge: %d\n", ret); dev_err(dev, "Failed to attach bridge: %d\n", ret);
goto err_cleanup; goto err_cleanup;
...@@ -770,11 +772,11 @@ static int mtk_dpi_probe(struct platform_device *pdev) ...@@ -770,11 +772,11 @@ static int mtk_dpi_probe(struct platform_device *pdev)
} }
ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0, ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
NULL, &dpi->bridge); NULL, &dpi->next_bridge);
if (ret) if (ret)
return ret; return ret;
dev_info(dev, "Found bridge node: %pOF\n", dpi->bridge->of_node); dev_info(dev, "Found bridge node: %pOF\n", dpi->next_bridge->of_node);
comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI); comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
if (comp_id < 0) { if (comp_id < 0) {
...@@ -791,8 +793,15 @@ static int mtk_dpi_probe(struct platform_device *pdev) ...@@ -791,8 +793,15 @@ static int mtk_dpi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, dpi); platform_set_drvdata(pdev, dpi);
dpi->bridge.funcs = &mtk_dpi_bridge_funcs;
dpi->bridge.of_node = dev->of_node;
dpi->bridge.type = DRM_MODE_CONNECTOR_DPI;
drm_bridge_add(&dpi->bridge);
ret = component_add(dev, &mtk_dpi_component_ops); ret = component_add(dev, &mtk_dpi_component_ops);
if (ret) { if (ret) {
drm_bridge_remove(&dpi->bridge);
dev_err(dev, "Failed to add component: %d\n", ret); dev_err(dev, "Failed to add component: %d\n", ret);
return ret; return ret;
} }
...@@ -802,7 +811,10 @@ static int mtk_dpi_probe(struct platform_device *pdev) ...@@ -802,7 +811,10 @@ static int mtk_dpi_probe(struct platform_device *pdev)
static int mtk_dpi_remove(struct platform_device *pdev) static int mtk_dpi_remove(struct platform_device *pdev)
{ {
struct mtk_dpi *dpi = platform_get_drvdata(pdev);
component_del(&pdev->dev, &mtk_dpi_component_ops); component_del(&pdev->dev, &mtk_dpi_component_ops);
drm_bridge_remove(&dpi->bridge);
return 0; return 0;
} }
......
...@@ -13,6 +13,8 @@ ...@@ -13,6 +13,8 @@
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/soc/mediatek/mtk-cmdq.h> #include <linux/soc/mediatek/mtk-cmdq.h>
#include <drm/drm_print.h>
#include "mtk_drm_drv.h" #include "mtk_drm_drv.h"
#include "mtk_drm_plane.h" #include "mtk_drm_plane.h"
#include "mtk_drm_ddp_comp.h" #include "mtk_drm_ddp_comp.h"
...@@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { ...@@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
}; };
static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp,
const enum mtk_ddp_comp_id *path,
unsigned int path_len)
{
unsigned int i;
if (path == NULL)
return false;
for (i = 0U; i < path_len; i++)
if (ddp_comp.id == path[i])
return true;
return false;
}
int mtk_ddp_comp_get_id(struct device_node *node, int mtk_ddp_comp_get_id(struct device_node *node,
enum mtk_ddp_comp_type comp_type) enum mtk_ddp_comp_type comp_type)
{ {
...@@ -427,6 +445,26 @@ int mtk_ddp_comp_get_id(struct device_node *node, ...@@ -427,6 +445,26 @@ int mtk_ddp_comp_get_id(struct device_node *node,
return -EINVAL; return -EINVAL;
} }
unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
struct mtk_ddp_comp ddp_comp)
{
struct mtk_drm_private *private = drm->dev_private;
unsigned int ret = 0;
if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path, private->data->main_len))
ret = BIT(0);
else if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->ext_path,
private->data->ext_len))
ret = BIT(1);
else if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->third_path,
private->data->third_len))
ret = BIT(2);
else
DRM_INFO("Failed to find comp in ddp table\n");
return ret;
}
int mtk_ddp_comp_init(struct device *dev, struct device_node *node, int mtk_ddp_comp_init(struct device *dev, struct device_node *node,
struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
const struct mtk_ddp_comp_funcs *funcs) const struct mtk_ddp_comp_funcs *funcs)
......
...@@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp, ...@@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
int mtk_ddp_comp_get_id(struct device_node *node, int mtk_ddp_comp_get_id(struct device_node *node,
enum mtk_ddp_comp_type comp_type); enum mtk_ddp_comp_type comp_type);
unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
struct mtk_ddp_comp ddp_comp);
int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node, int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
const struct mtk_ddp_comp_funcs *funcs); const struct mtk_ddp_comp_funcs *funcs);
......
...@@ -74,6 +74,19 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { ...@@ -74,6 +74,19 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
DDP_COMPONENT_DPI0, DDP_COMPONENT_DPI0,
}; };
static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = {
DDP_COMPONENT_OVL0,
DDP_COMPONENT_RDMA0,
DDP_COMPONENT_COLOR0,
DDP_COMPONENT_BLS,
DDP_COMPONENT_DPI0,
};
static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = {
DDP_COMPONENT_RDMA1,
DDP_COMPONENT_DSI0,
};
static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL0,
DDP_COMPONENT_COLOR0, DDP_COMPONENT_COLOR0,
...@@ -127,6 +140,14 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { ...@@ -127,6 +140,14 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.shadow_register = true, .shadow_register = true,
}; };
static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = {
.main_path = mt7623_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt7623_mtk_ddp_main),
.ext_path = mt7623_mtk_ddp_ext,
.ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext),
.shadow_register = true,
};
static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
.main_path = mt2712_mtk_ddp_main, .main_path = mt2712_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
...@@ -422,6 +443,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { ...@@ -422,6 +443,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
static const struct of_device_id mtk_drm_of_ids[] = { static const struct of_device_id mtk_drm_of_ids[] = {
{ .compatible = "mediatek,mt2701-mmsys", { .compatible = "mediatek,mt2701-mmsys",
.data = &mt2701_mmsys_driver_data}, .data = &mt2701_mmsys_driver_data},
{ .compatible = "mediatek,mt7623-mmsys",
.data = &mt7623_mmsys_driver_data},
{ .compatible = "mediatek,mt2712-mmsys", { .compatible = "mediatek,mt2712-mmsys",
.data = &mt2712_mmsys_driver_data}, .data = &mt2712_mmsys_driver_data},
{ .compatible = "mediatek,mt8173-mmsys", { .compatible = "mediatek,mt8173-mmsys",
......
...@@ -970,11 +970,7 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) ...@@ -970,11 +970,7 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)
return ret; return ret;
} }
/* dsi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp);
* Currently display data paths are statically assigned to a crtc each.
* crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0
*/
dsi->encoder.possible_crtcs = 1;
ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL, ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,
DRM_BRIDGE_ATTACH_NO_CONNECTOR); DRM_BRIDGE_ATTACH_NO_CONNECTOR);
......
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h> #include <linux/mutex.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/of.h> #include <linux/of.h>
...@@ -145,11 +146,16 @@ struct hdmi_audio_param { ...@@ -145,11 +146,16 @@ struct hdmi_audio_param {
struct hdmi_codec_params codec_params; struct hdmi_codec_params codec_params;
}; };
struct mtk_hdmi_conf {
bool tz_disabled;
};
struct mtk_hdmi { struct mtk_hdmi {
struct drm_bridge bridge; struct drm_bridge bridge;
struct drm_bridge *next_bridge; struct drm_bridge *next_bridge;
struct drm_connector conn; struct drm_connector conn;
struct device *dev; struct device *dev;
const struct mtk_hdmi_conf *conf;
struct phy *phy; struct phy *phy;
struct device *cec_dev; struct device *cec_dev;
struct i2c_adapter *ddc_adpt; struct i2c_adapter *ddc_adpt;
...@@ -234,7 +240,6 @@ static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black) ...@@ -234,7 +240,6 @@ static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black)
static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
{ {
struct arm_smccc_res res; struct arm_smccc_res res;
struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(hdmi->phy);
/* /*
* MT8173 HDMI hardware has an output control bit to enable/disable HDMI * MT8173 HDMI hardware has an output control bit to enable/disable HDMI
...@@ -242,7 +247,7 @@ static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) ...@@ -242,7 +247,7 @@ static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
* The ARM trusted firmware provides an API for the HDMI driver to set * The ARM trusted firmware provides an API for the HDMI driver to set
* this control bit to enable HDMI output in supervisor mode. * this control bit to enable HDMI output in supervisor mode.
*/ */
if (hdmi_phy->conf && hdmi_phy->conf->tz_disabled) if (hdmi->conf && hdmi->conf->tz_disabled)
regmap_update_bits(hdmi->sys_regmap, regmap_update_bits(hdmi->sys_regmap,
hdmi->sys_offset + HDMI_SYS_CFG20, hdmi->sys_offset + HDMI_SYS_CFG20,
0x80008005, enable ? 0x80000005 : 0x8000); 0x80008005, enable ? 0x80000005 : 0x8000);
...@@ -1723,6 +1728,7 @@ static int mtk_drm_hdmi_probe(struct platform_device *pdev) ...@@ -1723,6 +1728,7 @@ static int mtk_drm_hdmi_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
hdmi->dev = dev; hdmi->dev = dev;
hdmi->conf = of_device_get_match_data(dev);
ret = mtk_hdmi_dt_parse_pdata(hdmi, pdev); ret = mtk_hdmi_dt_parse_pdata(hdmi, pdev);
if (ret) if (ret)
...@@ -1803,8 +1809,16 @@ static int mtk_hdmi_resume(struct device *dev) ...@@ -1803,8 +1809,16 @@ static int mtk_hdmi_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(mtk_hdmi_pm_ops, static SIMPLE_DEV_PM_OPS(mtk_hdmi_pm_ops,
mtk_hdmi_suspend, mtk_hdmi_resume); mtk_hdmi_suspend, mtk_hdmi_resume);
static const struct mtk_hdmi_conf mtk_hdmi_conf_mt2701 = {
.tz_disabled = true,
};
static const struct of_device_id mtk_drm_hdmi_of_ids[] = { static const struct of_device_id mtk_drm_hdmi_of_ids[] = {
{ .compatible = "mediatek,mt8173-hdmi", }, { .compatible = "mediatek,mt2701-hdmi",
.data = &mtk_hdmi_conf_mt2701,
},
{ .compatible = "mediatek,mt8173-hdmi",
},
{} {}
}; };
...@@ -1819,7 +1833,6 @@ static struct platform_driver mtk_hdmi_driver = { ...@@ -1819,7 +1833,6 @@ static struct platform_driver mtk_hdmi_driver = {
}; };
static struct platform_driver * const mtk_hdmi_drivers[] = { static struct platform_driver * const mtk_hdmi_drivers[] = {
&mtk_hdmi_phy_driver,
&mtk_hdmi_ddc_driver, &mtk_hdmi_ddc_driver,
&mtk_cec_driver, &mtk_cec_driver,
&mtk_hdmi_driver, &mtk_hdmi_driver,
......
...@@ -5,7 +5,6 @@ ...@@ -5,7 +5,6 @@
*/ */
#ifndef _MTK_HDMI_CTRL_H #ifndef _MTK_HDMI_CTRL_H
#define _MTK_HDMI_CTRL_H #define _MTK_HDMI_CTRL_H
#include "mtk_hdmi_phy.h"
struct platform_driver; struct platform_driver;
......
...@@ -35,3 +35,10 @@ config PHY_MTK_XSPHY ...@@ -35,3 +35,10 @@ config PHY_MTK_XSPHY
Enable this to support the SuperSpeedPlus XS-PHY transceiver for Enable this to support the SuperSpeedPlus XS-PHY transceiver for
USB3.1 GEN2 controllers on MediaTek chips. The driver supports USB3.1 GEN2 controllers on MediaTek chips. The driver supports
multiple USB2.0, USB3.1 GEN2 ports. multiple USB2.0, USB3.1 GEN2 ports.
config PHY_MTK_HDMI
tristate "MediaTek HDMI-PHY Driver"
depends on ARCH_MEDIATEK && OF
select GENERIC_PHY
help
Support HDMI PHY for Mediatek SoCs.
...@@ -6,3 +6,8 @@ ...@@ -6,3 +6,8 @@
obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
obj-$(CONFIG_PHY_MTK_UFS) += phy-mtk-ufs.o obj-$(CONFIG_PHY_MTK_UFS) += phy-mtk-ufs.o
obj-$(CONFIG_PHY_MTK_XSPHY) += phy-mtk-xsphy.o obj-$(CONFIG_PHY_MTK_XSPHY) += phy-mtk-xsphy.o
phy-mtk-hdmi-drv-y := phy-mtk-hdmi.o
phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt8173.o
obj-$(CONFIG_PHY_MTK_HDMI) += phy-mtk-hdmi-drv.o
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: Chunhui Dai <chunhui.dai@mediatek.com> * Author: Chunhui Dai <chunhui.dai@mediatek.com>
*/ */
#include "mtk_hdmi_phy.h" #include "phy-mtk-hdmi.h"
#define HDMI_CON0 0x00 #define HDMI_CON0 0x00
#define RG_HDMITX_DRV_IBIAS 0 #define RG_HDMITX_DRV_IBIAS 0
...@@ -237,8 +237,8 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy) ...@@ -237,8 +237,8 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
} }
struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = { struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
.tz_disabled = true,
.flags = CLK_SET_RATE_GATE, .flags = CLK_SET_RATE_GATE,
.pll_default_off = true,
.hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops, .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
.hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds, .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
.hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds, .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: Jie Qiu <jie.qiu@mediatek.com> * Author: Jie Qiu <jie.qiu@mediatek.com>
*/ */
#include "mtk_hdmi_phy.h" #include "phy-mtk-hdmi.h"
#define HDMI_CON0 0x00 #define HDMI_CON0 0x00
#define RG_HDMITX_PLL_EN BIT(31) #define RG_HDMITX_PLL_EN BIT(31)
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: Jie Qiu <jie.qiu@mediatek.com> * Author: Jie Qiu <jie.qiu@mediatek.com>
*/ */
#include "mtk_hdmi_phy.h" #include "phy-mtk-hdmi.h"
static int mtk_hdmi_phy_power_on(struct phy *phy); static int mtk_hdmi_phy_power_on(struct phy *phy);
static int mtk_hdmi_phy_power_off(struct phy *phy); static int mtk_hdmi_phy_power_off(struct phy *phy);
...@@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) ...@@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
return PTR_ERR(phy_provider); return PTR_ERR(phy_provider);
} }
if (hdmi_phy->conf->pll_default_off)
hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
hdmi_phy->pll); hdmi_phy->pll);
} }
...@@ -205,6 +208,7 @@ struct platform_driver mtk_hdmi_phy_driver = { ...@@ -205,6 +208,7 @@ struct platform_driver mtk_hdmi_phy_driver = {
.of_match_table = mtk_hdmi_phy_match, .of_match_table = mtk_hdmi_phy_match,
}, },
}; };
module_platform_driver(mtk_hdmi_phy_driver);
MODULE_DESCRIPTION("MediaTek HDMI PHY Driver"); MODULE_DESCRIPTION("MediaTek HDMI PHY Driver");
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
...@@ -20,8 +20,8 @@ ...@@ -20,8 +20,8 @@
struct mtk_hdmi_phy; struct mtk_hdmi_phy;
struct mtk_hdmi_phy_conf { struct mtk_hdmi_phy_conf {
bool tz_disabled;
unsigned long flags; unsigned long flags;
bool pll_default_off;
const struct clk_ops *hdmi_phy_clk_ops; const struct clk_ops *hdmi_phy_clk_ops;
void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy); void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy); void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
...@@ -50,7 +50,6 @@ void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, ...@@ -50,7 +50,6 @@ void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 val, u32 mask); u32 val, u32 mask);
struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
extern struct platform_driver mtk_hdmi_phy_driver;
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;
......
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