Commit 080edf75 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul

dmaengine: hsu: set HSU_CH_MTSR to memory width

HSU_CH_MTSR register should be programmed to a minimum size to transfer. This
size on a memory side of the transfer. Program it accordingly.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent f55532a0
......@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
if (hsuc->direction == DMA_MEM_TO_DEV) {
bsr = config->dst_maxburst;
mtsr = config->dst_addr_width;
mtsr = config->src_addr_width;
} else if (hsuc->direction == DMA_DEV_TO_MEM) {
bsr = config->src_maxburst;
mtsr = config->src_addr_width;
mtsr = config->dst_addr_width;
}
hsu_chan_disable(hsuc);
......
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