Commit 0b7bb77f authored by Peter Korsgaard's avatar Peter Korsgaard Committed by Grant Likely

gpio/mcp23s08: support mcp23s17 variant

mpc23s17 is very similar to the mcp23s08, except that registers are 16bit
wide, so extend the interface to work with both variants.

The s17 variant also has an additional address pin, so adjust platform
data structure to support up to 8 devices per SPI chipselect.
Signed-off-by: default avatarPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent 9c3c8afc
......@@ -368,11 +368,11 @@ config GPIO_MAX7301
GPIO driver for Maxim MAX7301 SPI-based GPIO expander.
config GPIO_MCP23S08
tristate "Microchip MCP23S08 I/O expander"
tristate "Microchip MCP23Sxx I/O expander"
depends on SPI_MASTER
help
SPI driver for Microchip MCP23S08 I/O expander. This provides
a GPIO interface supporting inputs and outputs.
SPI driver for Microchip MCP23S08/MPC23S17 I/O expanders.
This provides a GPIO interface supporting inputs and outputs.
config GPIO_MC33880
tristate "Freescale MC33880 high-side/low-side switch"
......
This diff is collapsed.
......@@ -2,21 +2,24 @@
/* FIXME driver should be able to handle IRQs... */
struct mcp23s08_chip_info {
bool is_present; /* true iff populated */
u8 pullups; /* BIT(x) means enable pullup x */
bool is_present; /* true if populated */
unsigned pullups; /* BIT(x) means enable pullup x */
};
struct mcp23s08_platform_data {
/* Four slaves (numbered 0..3) can share one SPI chipselect, and
* will provide 8..32 GPIOs using 1..4 gpio_chip instances.
/* For mcp23s08, up to 4 slaves (numbered 0..3) can share one SPI
* chipselect, each providing 1 gpio_chip instance with 8 gpios.
* For mpc23s17, up to 8 slaves (numbered 0..7) can share one SPI
* chipselect, each providing 1 gpio_chip (port A + port B) with
* 16 gpios.
*/
struct mcp23s08_chip_info chip[4];
struct mcp23s08_chip_info chip[8];
/* "base" is the number of the first GPIO. Dynamic assignment is
* not currently supported, and even if there are gaps in chip
* addressing the GPIO numbers are sequential .. so for example
* if only slaves 0 and 3 are present, their GPIOs range from
* base to base+15.
* base to base+15 (or base+31 for s17 variant).
*/
unsigned base;
......
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