Commit 0e1b869f authored by Eduardo Habkost's avatar Eduardo Habkost Committed by Paolo Bonzini

kvm: x86: Add AMD's EX_CFG to the list of ignored MSRs

Some guests OSes (including Windows 10) write to MSR 0xc001102c
on some cases (possibly while trying to apply a CPU errata).
Make KVM ignore reads and writes to that MSR, so the guest won't
crash.

The MSR is documented as "Execution Unit Configuration (EX_CFG)",
at AMD's "BIOS and Kernel Developer's Guide (BKDG) for AMD Family
15h Models 00h-0Fh Processors".

Cc: stable@vger.kernel.org
Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent dcbd3e49
...@@ -390,6 +390,7 @@ ...@@ -390,6 +390,7 @@
#define MSR_F15H_NB_PERF_CTR 0xc0010241 #define MSR_F15H_NB_PERF_CTR 0xc0010241
#define MSR_F15H_PTSC 0xc0010280 #define MSR_F15H_PTSC 0xc0010280
#define MSR_F15H_IC_CFG 0xc0011021 #define MSR_F15H_IC_CFG 0xc0011021
#define MSR_F15H_EX_CFG 0xc001102c
/* Fam 10h MSRs */ /* Fam 10h MSRs */
#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058 #define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
......
...@@ -2426,6 +2426,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) ...@@ -2426,6 +2426,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_AMD64_PATCH_LOADER: case MSR_AMD64_PATCH_LOADER:
case MSR_AMD64_BU_CFG2: case MSR_AMD64_BU_CFG2:
case MSR_AMD64_DC_CFG: case MSR_AMD64_DC_CFG:
case MSR_F15H_EX_CFG:
break; break;
case MSR_IA32_UCODE_REV: case MSR_IA32_UCODE_REV:
...@@ -2721,6 +2722,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) ...@@ -2721,6 +2722,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_AMD64_BU_CFG2: case MSR_AMD64_BU_CFG2:
case MSR_IA32_PERF_CTL: case MSR_IA32_PERF_CTL:
case MSR_AMD64_DC_CFG: case MSR_AMD64_DC_CFG:
case MSR_F15H_EX_CFG:
msr_info->data = 0; msr_info->data = 0;
break; break;
case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5: case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
......
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