Commit 0fa09d2e authored by Liam Girdwood's avatar Liam Girdwood Committed by Jiri Slaby

ASoC: max98090: Fix reset at resume time

commit 25b4ab43 upstream.

Reset needs to wait 20ms before other codec IO is performed. This wait
was not being performed. Fix this by making sure the reset register is not
restored with the cache, but use the manual reset method in resume with
the wait.
Signed-off-by: default avatarLiam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent 347b9fed
...@@ -255,6 +255,7 @@ static struct reg_default max98090_reg[] = { ...@@ -255,6 +255,7 @@ static struct reg_default max98090_reg[] = {
static bool max98090_volatile_register(struct device *dev, unsigned int reg) static bool max98090_volatile_register(struct device *dev, unsigned int reg)
{ {
switch (reg) { switch (reg) {
case M98090_REG_SOFTWARE_RESET:
case M98090_REG_DEVICE_STATUS: case M98090_REG_DEVICE_STATUS:
case M98090_REG_JACK_STATUS: case M98090_REG_JACK_STATUS:
case M98090_REG_REVISION_ID: case M98090_REG_REVISION_ID:
...@@ -2360,6 +2361,8 @@ static int max98090_runtime_resume(struct device *dev) ...@@ -2360,6 +2361,8 @@ static int max98090_runtime_resume(struct device *dev)
regcache_cache_only(max98090->regmap, false); regcache_cache_only(max98090->regmap, false);
max98090_reset(max98090);
regcache_sync(max98090->regmap); regcache_sync(max98090->regmap);
return 0; return 0;
......
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