Skip to content

L
linux
Commit 0ff3758b authored by Olof Johansson's avatar Olof Johansson
Browse files
Options

Merge tag 'imx-fixes-nc-4.11' of... 

Merge tag 'imx-fixes-nc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

i.MX non-critical device tree fixes for 4.11:
 - A couple of fixes on anatop regulator voltage and constraints
   according to hardware datasheet.
 - Correct FEC interrupt routing for i.MX6QP which has got the hardware
   bug found on i.MX6Q fixed.
 - Remove unit address from i.MX6 LDB device node to fix DTC warning.
 - A fix on imx53-qsb board FEC pinmux config to remove the dependency
   on firmware for setting up pins.
 - A series from Sascha to fix LPSR pins for i.MX7 boards.

* tag 'imx-fixes-nc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx53-qsb-common: fix FEC pinmux config
  ARM: imx6: remove unit address from LDB node
  ARM: imx6qp: adapt DT to changed FEC interrupts
  ARM: imx6: fix regulator constraints on anatop 1p1 and 2p5
  ARM: imx6: fix min/max voltage of anatop 2p5 regulator
  ARM: dts: imx7: Add "LPSR" to LPSR iomux pin names
  ARM: dts: imx7d-cl-som: Fix OTG power pinctrl
  ARM: dts: imx7d-sdb: Fix watchdog and pwm pinmux
  ARM: dts: imx7s-warp: Fix watchdog pinmux
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 3c63c24d 8b649e42
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 116 additions and 104 deletions
arch/arm/boot/dts/imx53-qsb-common.dtsi
View file @ 0ff3758b
......@@ -215,16 +215,16 @@ MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
>;
};
......
arch/arm/boot/dts/imx6qdl.dtsi
View file @ 0ff3758b
......@@ -626,8 +626,8 @@ anatop: anatop@020c8000 {
regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1375000>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
anatop-reg-offset = <0x110>;
anatop-vol-bit-shift = <8>;
......@@ -654,15 +654,15 @@ regulator-3p0 {
regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2000000>;
regulator-min-microvolt = <2250000>;
regulator-max-microvolt = <2750000>;
regulator-always-on;
anatop-reg-offset = <0x130>;
anatop-vol-bit-shift = <8>;
anatop-vol-bit-width = <5>;
anatop-min-bit-val = <0>;
anatop-min-voltage = <2000000>;
anatop-max-voltage = <2750000>;
anatop-min-voltage = <2100000>;
anatop-max-voltage = <2875000>;
};
reg_arm: regulator-vddcore {
......@@ -808,7 +808,7 @@ iomuxc: iomuxc@020e0000 {
reg = <0x020e0000 0x4000>;
};
ldb: ldb@020e0008 {
ldb: ldb {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
......
arch/arm/boot/dts/imx6qp.dtsi
View file @ 0ff3758b
......@@ -95,6 +95,12 @@ mmdc0: mmdc@021b0000 { /* MMDC0 */
};
};
&fec {
/delete-property/interrupts-extended;
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
<0 119 IRQ_TYPE_LEVEL_HIGH>;
};
&ldb {
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
......
arch/arm/boot/dts/imx7-colibri.dtsi
View file @ 0ff3758b
......@@ -596,29 +596,29 @@ &iomuxc_lpsr {
pinctrl_gpio_lpsr: gpio1-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO01__GPIO1_IO1 0x59
MX7D_PAD_GPIO1_IO02__GPIO1_IO2 0x59
MX7D_PAD_GPIO1_IO03__GPIO1_IO3 0x59
MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x59
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59
MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59
>;
};
pinctrl_i2c1: i2c1-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x4000007f
MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
>;
};
pinctrl_cd_usdhc1: usdhc1-cd-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */
MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */
>;
};
pinctrl_uart1_ctrl2: uart1-ctrl2-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */
MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */
MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */
>;
};
};
arch/arm/boot/dts/imx7d-cl-som-imx7.dts
View file @ 0ff3758b
......@@ -261,12 +261,6 @@ MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
>;
};
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
......@@ -283,3 +277,11 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
};
};
&iomuxc_lpsr {
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */
>;
};
};
\ No newline at end of file
arch/arm/boot/dts/imx7d-nitrogen7.dts
View file @ 0ff3758b
......@@ -712,33 +712,33 @@ &iomuxc_lpsr {
pinctrl_hog_2: hoggrp-2 {
fsl,pins = <
MX7D_PAD_GPIO1_IO02__GPIO1_IO2 0x7d
MX7D_PAD_GPIO1_IO03__CCM_CLKO2 0x7d
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x7d
MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d
>;
};
pinctrl_backlight_j9: backlightj9grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x7d
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x7d
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO01__PWM1_OUT 0x7d
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x7d
>;
};
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO04__USB_OTG1_OC 0x7d
MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14
MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x7d
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14
>;
};
pinctrl_wdog1: wdog1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x75
MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x75
>;
};
};
arch/arm/boot/dts/imx7d-pinfunc.h
View file @ 0ff3758b
This diff is collapsed.
arch/arm/boot/dts/imx7d-sdb.dts
View file @ 0ff3758b
......@@ -502,12 +502,6 @@ MX7D_PAD_LCD_RESET__LCD_RESET 0x79
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO01__PWM1_OUT 0x110b0
>;
};
pinctrl_tsc2046_pendown: tsc2046_pendown {
fsl,pins = <
MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59
......@@ -635,11 +629,19 @@ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
};
};
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
>;
};
&iomuxc_lpsr {
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x74
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0
>;
};
};
arch/arm/boot/dts/imx7s-warp.dts
View file @ 0ff3758b
......@@ -437,10 +437,12 @@ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1b
>;
};
};
&iomuxc_lpsr {
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B 0x74
>;
};
};
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7