Commit 137d23ce authored by Dylan Hung's avatar Dylan Hung Committed by Jakub Kicinski

net: ftgmac100: Fix Aspeed ast2600 TX hang issue

The new HW arbitration feature on Aspeed ast2600 will cause MAC TX to
hang when handling scatter-gather DMA.  Disable the problematic feature
by setting MAC register 0x58 bit28 and bit27.

Fixes: 39bfab88 ("net: ftgmac100: Add support for DT phy-handle property")
Signed-off-by: default avatarDylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent ec78e318
...@@ -1817,6 +1817,11 @@ static int ftgmac100_probe(struct platform_device *pdev) ...@@ -1817,6 +1817,11 @@ static int ftgmac100_probe(struct platform_device *pdev)
priv->rxdes0_edorr_mask = BIT(30); priv->rxdes0_edorr_mask = BIT(30);
priv->txdes0_edotr_mask = BIT(30); priv->txdes0_edotr_mask = BIT(30);
priv->is_aspeed = true; priv->is_aspeed = true;
/* Disable ast2600 problematic HW arbitration */
if (of_device_is_compatible(np, "aspeed,ast2600-mac")) {
iowrite32(FTGMAC100_TM_DEFAULT,
priv->base + FTGMAC100_OFFSET_TM);
}
} else { } else {
priv->rxdes0_edorr_mask = BIT(15); priv->rxdes0_edorr_mask = BIT(15);
priv->txdes0_edotr_mask = BIT(15); priv->txdes0_edotr_mask = BIT(15);
......
...@@ -169,6 +169,14 @@ ...@@ -169,6 +169,14 @@
#define FTGMAC100_MACCR_FAST_MODE (1 << 19) #define FTGMAC100_MACCR_FAST_MODE (1 << 19)
#define FTGMAC100_MACCR_SW_RST (1 << 31) #define FTGMAC100_MACCR_SW_RST (1 << 31)
/*
* test mode control register
*/
#define FTGMAC100_TM_RQ_TX_VALID_DIS (1 << 28)
#define FTGMAC100_TM_RQ_RR_IDLE_PREV (1 << 27)
#define FTGMAC100_TM_DEFAULT \
(FTGMAC100_TM_RQ_TX_VALID_DIS | FTGMAC100_TM_RQ_RR_IDLE_PREV)
/* /*
* PHY control register * PHY control register
*/ */
......
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