Commit 147dbfbc authored by David Zhang's avatar David Zhang Committed by Alex Deucher

drm/amdgpu: remove the VI hardware semaphore in ring sync

Signed-off-by: default avatarDavid Zhang <david1.zhang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
parent bd5c97bc
...@@ -3783,11 +3783,10 @@ static bool gfx_v8_0_ring_emit_semaphore(struct amdgpu_ring *ring, ...@@ -3783,11 +3783,10 @@ static bool gfx_v8_0_ring_emit_semaphore(struct amdgpu_ring *ring,
unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL;
if (ring->adev->asic_type == CHIP_TOPAZ || if (ring->adev->asic_type == CHIP_TOPAZ ||
ring->adev->asic_type == CHIP_TONGA) { ring->adev->asic_type == CHIP_TONGA)
amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); /* we got a hw semaphore bug in VI TONGA, return false to switch back to sw fence wait */
amdgpu_ring_write(ring, lower_32_bits(addr)); return false;
amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); else {
} else {
amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 2)); amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 2));
amdgpu_ring_write(ring, lower_32_bits(addr)); amdgpu_ring_write(ring, lower_32_bits(addr));
amdgpu_ring_write(ring, upper_32_bits(addr)); amdgpu_ring_write(ring, upper_32_bits(addr));
......
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