kbuild: remove clean-dirs syntax

The only the difference between clean-files and clean-dirs is the -r
option passed to the 'rm' command.

You can always pass -r, and then remove the clean-dirs syntax.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Documentation/kbuild/makefiles.rst

@@ -750,7 +750,8 @@ Files matching the patterns "*.[oas]", "*.ko", plus some additional files
 generated by kbuild are deleted all over the kernel src tree when
 "make clean" is executed.
 
-Additional files can be specified in kbuild makefiles by use of $(clean-files).
+Additional files or directories can be specified in kbuild makefiles by use of
+$(clean-files).
 
 	Example::
 
@@ -761,17 +762,8 @@ When executing "make clean", the file "crc32table.h" will be deleted.
 Kbuild will assume files to be in the same relative directory as the
 Makefile, except if prefixed with $(objtree).
 
-To delete a directory hierarchy use:
-
-	Example::
-
-		#scripts/package/Makefile
-		clean-dirs := $(objtree)/debian/
-
-This will delete the directory debian in the toplevel directory, including all
-subdirectories.
-
-To exclude certain files from make clean, use the $(no-clean-files) variable.
+To exclude certain files or directories from make clean, use the
+$(no-clean-files) variable.
 
 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
 but in the architecture makefiles where the kbuild infrastructure

scripts/Makefile.clean

@@ -52,26 +52,14 @@ __clean-files   := $(wildcard                                               \
 		   $(addprefix $(obj)/, $(filter-out $(objtree)/%, $(__clean-files))) \
 		   $(filter $(objtree)/%, $(__clean-files)))
 
-# same as clean-files
-
-__clean-dirs    := $(wildcard                                               \
-		   $(addprefix $(obj)/, $(filter-out $(objtree)/%, $(clean-dirs)))    \
-		   $(filter $(objtree)/%, $(clean-dirs)))
-
 # ==========================================================================
 
-quiet_cmd_clean    = CLEAN   $(obj)
-      cmd_clean    = rm -f $(__clean-files)
-quiet_cmd_cleandir = CLEAN   $(__clean-dirs)
-      cmd_cleandir = rm -rf $(__clean-dirs)
-
+quiet_cmd_clean = CLEAN   $(obj)
+      cmd_clean = rm -rf $(__clean-files)
 
 __clean: $(subdir-ymn)
 ifneq ($(strip $(__clean-files)),)
 	+$(call cmd,clean)
-endif
-ifneq ($(strip $(__clean-dirs)),)
-	+$(call cmd,cleandir)
 endif
 	@:
 

scripts/kconfig/Makefile

@@ -114,7 +114,7 @@ testconfig: $(obj)/conf
 	$(PYTHON3) -B -m pytest $(srctree)/$(src)/tests \
 	-o cache_dir=$(abspath $(obj)/tests/.cache) \
 	$(if $(findstring 1,$(KBUILD_VERBOSE)),--capture=no)
-clean-dirs += tests/.cache
+clean-files += tests/.cache
 
 # Help text used by make help
 help:

usr/include/Makefile

@@ -115,6 +115,4 @@ header-test-y += $(filter-out $(header-test-), \
 			$(patsubst $(obj)/%,%, $(wildcard \
 			$(addprefix $(obj)/, *.h */*.h */*/*.h */*/*/*.h))))
 
-# For GNU Make <= 4.2.1, $(wildcard $(obj)/*/) matches to not only directories
-# but also regular files. Use $(filter %/, ...) just in case.
-clean-dirs += $(patsubst $(obj)/%/,%,$(filter %/, $(wildcard $(obj)/*/)))
+clean-files += $(filter-out Makefile, $(notdir $(wildcard $(obj)/*)))