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Commit 16adb5ce authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'samsung-dt64-5.5' of... 

Merge tag 'samsung-dt64-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.5

1. Fix boot of Exynos7 due to wrong address/size of memory node,
2. Move GPU under /soc node,
3. Minor of DT bindings.

* tag 'samsung-dt64-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Rename Multi Core Timer node to "timer" on Exynos5433
  arm64: dts: exynos: Split phandle in dmas property on Exynos5433
  arm64: dts: exynos: Swap clock order of sysmmu on Exynos5433
  arm64: dts: exynos: Revert "Remove unneeded address space mapping for soc node"
  arm64: dts: exynos: Move GPU under /soc node for Exynos7
  arm64: dts: exynos: Move GPU under /soc node for Exynos5433

Link: https://lore.kernel.org/r/20191021180453.29455-5-krzk@kernel.orgSigned-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 60107c77 9f17f839
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arch/arm64/boot/dts/exynos/exynos5433.dtsi
View file @ 16adb5ce
......@@ -18,8 +18,8 @@
/ {
compatible = "samsung,exynos5433";
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
......@@ -249,57 +249,6 @@ opp-1900000000 {
};
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&cmu_g3d CLK_ACLK_G3D>;
clock-names = "core";
power-domains = <&pd_g3d>;
operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
gpu_opp_table: opp_table {
compatible = "operating-points-v2";
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <1000000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1000000>;
};
opp-350000000 {
opp-hz = /bits/ 64 <350000000>;
opp-microvolt = <1025000>;
};
opp-420000000 {
opp-hz = /bits/ 64 <420000000>;
opp-microvolt = <1025000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1075000>;
};
opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
opp-microvolt = <1125000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1150000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <1150000>;
};
};
};
psci {
compatible = "arm,psci";
method = "smc";
......@@ -311,7 +260,7 @@ soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x0 0x0 0x18000000>;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
......@@ -754,7 +703,7 @@ tmu_isp: tmu@1007c000 {
status = "disabled";
};
mct@101c0000 {
timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0x800>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
......@@ -1125,6 +1074,57 @@ gsc_2: video-scaler@13c20000 {
power-domains = <&pd_gscl>;
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&cmu_g3d CLK_ACLK_G3D>;
clock-names = "core";
power-domains = <&pd_g3d>;
operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
gpu_opp_table: opp_table {
compatible = "operating-points-v2";
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <1000000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1000000>;
};
opp-350000000 {
opp-hz = /bits/ 64 <350000000>;
opp-microvolt = <1025000>;
};
opp-420000000 {
opp-hz = /bits/ 64 <420000000>;
opp-microvolt = <1025000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1075000>;
};
opp-550000000 {
opp-hz = /bits/ 64 <550000000>;
opp-microvolt = <1125000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1150000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <1150000>;
};
};
};
scaler_0: scaler@15000000 {
compatible = "samsung,exynos5433-scaler";
reg = <0x15000000 0x1294>;
......@@ -1179,9 +1179,9 @@ sysmmu_decon0x: sysmmu@13a00000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a00000 0x1000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_disp CLK_PCLK_SMMU_DECON0X>,
<&cmu_disp CLK_ACLK_SMMU_DECON0X>;
clock-names = "aclk", "pclk";
clocks = <&cmu_disp CLK_ACLK_SMMU_DECON0X>,
<&cmu_disp CLK_PCLK_SMMU_DECON0X>;
power-domains = <&pd_disp>;
#iommu-cells = <0>;
};
......@@ -1190,9 +1190,9 @@ sysmmu_decon1x: sysmmu@13a10000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a10000 0x1000>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_disp CLK_PCLK_SMMU_DECON1X>,
<&cmu_disp CLK_ACLK_SMMU_DECON1X>;
clock-names = "aclk", "pclk";
clocks = <&cmu_disp CLK_ACLK_SMMU_DECON1X>,
<&cmu_disp CLK_PCLK_SMMU_DECON1X>;
#iommu-cells = <0>;
power-domains = <&pd_disp>;
};
......@@ -1201,9 +1201,9 @@ sysmmu_tv0x: sysmmu@13a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a20000 0x1000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_disp CLK_PCLK_SMMU_TV0X>,
<&cmu_disp CLK_ACLK_SMMU_TV0X>;
clock-names = "aclk", "pclk";
clocks = <&cmu_disp CLK_ACLK_SMMU_TV0X>,
<&cmu_disp CLK_PCLK_SMMU_TV0X>;
#iommu-cells = <0>;
power-domains = <&pd_disp>;
};
......@@ -1212,9 +1212,9 @@ sysmmu_tv1x: sysmmu@13a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a30000 0x1000>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_disp CLK_PCLK_SMMU_TV1X>,
<&cmu_disp CLK_ACLK_SMMU_TV1X>;
clock-names = "aclk", "pclk";
clocks = <&cmu_disp CLK_ACLK_SMMU_TV1X>,
<&cmu_disp CLK_PCLK_SMMU_TV1X>;
#iommu-cells = <0>;
power-domains = <&pd_disp>;
};
......@@ -1256,9 +1256,9 @@ sysmmu_scaler_0: sysmmu@15040000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15040000 0x1000>;
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>,
<&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>;
clock-names = "aclk", "pclk";
clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>,
<&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>;
#iommu-cells = <0>;
power-domains = <&pd_mscl>;
};
......@@ -1267,9 +1267,9 @@ sysmmu_scaler_1: sysmmu@15050000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15050000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>,
<&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>;
clock-names = "aclk", "pclk";
clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>,
<&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>;
#iommu-cells = <0>;
power-domains = <&pd_mscl>;
};
......@@ -1278,9 +1278,9 @@ sysmmu_jpeg: sysmmu@15060000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15060000 0x1000>;
interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>,
<&cmu_mscl CLK_ACLK_SMMU_JPEG>;
clock-names = "aclk", "pclk";
clocks = <&cmu_mscl CLK_ACLK_SMMU_JPEG>,
<&cmu_mscl CLK_PCLK_SMMU_JPEG>;
#iommu-cells = <0>;
power-domains = <&pd_mscl>;
};
......@@ -1289,9 +1289,9 @@ sysmmu_mfc_0: sysmmu@15200000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15200000 0x1000>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>,
<&cmu_mfc CLK_ACLK_SMMU_MFC_0>;
clock-names = "aclk", "pclk";
clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_0>,
<&cmu_mfc CLK_PCLK_SMMU_MFC_0>;
#iommu-cells = <0>;
power-domains = <&pd_mfc>;
};
......@@ -1300,9 +1300,9 @@ sysmmu_mfc_1: sysmmu@15210000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15210000 0x1000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "pclk", "aclk";
clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>,
<&cmu_mfc CLK_ACLK_SMMU_MFC_1>;
clock-names = "aclk", "pclk";
clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_1>,
<&cmu_mfc CLK_PCLK_SMMU_MFC_1>;
#iommu-cells = <0>;
power-domains = <&pd_mfc>;
};
......@@ -1452,7 +1452,7 @@ adc: adc@14d10000 {
i2s1: i2s@14d60000 {
compatible = "samsung,exynos7-i2s";
reg = <0x14d60000 0x100>;
dmas = <&pdma0 31 &pdma0 30>;
dmas = <&pdma0 31>, <&pdma0 30>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peric CLK_PCLK_I2S1>,
......@@ -1811,7 +1811,7 @@ adma: adma@11420000 {
i2s0: i2s@11440000 {
compatible = "samsung,exynos7-i2s";
reg = <0x11440000 0x100>;
dmas = <&adma 0 &adma 2>;
dmas = <&adma 0>, <&adma 2>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......
arch/arm64/boot/dts/exynos/exynos7.dtsi
View file @ 16adb5ce
......@@ -12,8 +12,8 @@
/ {
compatible = "samsung,exynos7";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
pinctrl0 = &pinctrl_alive;
......@@ -78,17 +78,6 @@ cpu_atlas3: cpu@3 {
};
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
status = "disabled";
/* TODO: operating points for DVFS, cooling device */
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
......@@ -98,7 +87,7 @@ soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0 0 0 0x18000000>;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
......@@ -523,6 +512,17 @@ watchdog: watchdog@101d0000 {
status = "disabled";
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
status = "disabled";
/* TODO: operating points for DVFS, cooling device */
};
mmc_0: mmc@15740000 {
compatible = "samsung,exynos7-dw-mshc-smu";
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
......
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