Commit 16fbf4cb authored by Vijay Kumar B's avatar Vijay Kumar B Committed by Greg Kroah-Hartman

Staging: poch: Parameter to enable synthetic counter

Adds a parameter that causes the hardware to synthesize Rx values
using a counter.
Signed-off-by: default avatarVijay Kumar B. <vijaykumar@bravegnu.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent e1bc5845
...@@ -245,6 +245,11 @@ struct poch_dev { ...@@ -245,6 +245,11 @@ struct poch_dev {
struct device *dev; struct device *dev;
}; };
static int synth_rx;
module_param(synth_rx, bool, 0600);
MODULE_PARM_DESC(synth_rx,
"Synthesize received values using a counter. Default: No");
static dev_t poch_first_dev; static dev_t poch_first_dev;
static struct class *poch_cls; static struct class *poch_cls;
static DEFINE_IDR(poch_ids); static DEFINE_IDR(poch_ids);
...@@ -827,9 +832,11 @@ static int poch_open(struct inode *inode, struct file *filp) ...@@ -827,9 +832,11 @@ static int poch_open(struct inode *inode, struct file *filp)
fpga + FPGA_TX_CTL_REG); fpga + FPGA_TX_CTL_REG);
} else { } else {
/* Flush RX FIFO and output data to cardbus. */ /* Flush RX FIFO and output data to cardbus. */
iowrite32(FPGA_RX_CTL_CONT_CAP u32 ctl_val = FPGA_RX_CTL_CONT_CAP | FPGA_RX_CTL_FIFO_FLUSH;
| FPGA_RX_CTL_FIFO_FLUSH, if (synth_rx)
fpga + FPGA_RX_CTL_REG); ctl_val |= FPGA_RX_CTL_SYNTH_DATA;
iowrite32(ctl_val, fpga + FPGA_RX_CTL_REG);
} }
atomic_inc(&channel->inited); atomic_inc(&channel->inited);
......
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