Commit 176a2eac authored by Alexey Brodkin's avatar Alexey Brodkin Committed by Zefan Li

stmmac: troubleshoot unexpected bits in des0 & des1

commit f1590670 upstream.

Current implementation of descriptor init procedure only takes
care about setting/clearing ownership flag in "des0"/"des1"
fields while it is perfectly possible to get unexpected bits
set because of the following factors:

 [1] On driver probe underlying memory allocated with
     dma_alloc_coherent() might not be zeroed and so
     it will be filled with garbage.

 [2] During driver operation some bits could be set by SD/MMC
     controller (for example error flags etc).

And unexpected and/or randomly set flags in "des0"/"des1"
fields may lead to unpredictable behavior of GMAC DMA block.

This change addresses both items above with:

 [1] Use of dma_zalloc_coherent() instead of simple
     dma_alloc_coherent() to make sure allocated memory is
     zeroed. That shouldn't affect performance because
     this allocation only happens once on driver probe.

 [2] Do explicit zeroing of both "des0" and "des1" fields
     of all buffer descriptors during initialization of
     DMA transfer.

And while at it fixed identation of dma_free_coherent()
counterpart as well.
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: arc-linux-dev@synopsys.com
Cc: linux-kernel@vger.kernel.org
Cc: David Miller <davem@davemloft.net>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
[lizf: Backported to 3.4:
 - adjust contest
 - adjust allocations in init_dma_desc_rings()]
Signed-off-by: default avatarZefan Li <lizefan@huawei.com>
parent e2b3a182
...@@ -153,6 +153,8 @@ struct dma_desc { ...@@ -153,6 +153,8 @@ struct dma_desc {
u32 buffer2_size:13; u32 buffer2_size:13;
u32 reserved4:3; u32 reserved4:3;
} etx; /* -- enhanced -- */ } etx; /* -- enhanced -- */
u64 all_flags;
} des01; } des01;
unsigned int des2; unsigned int des2;
unsigned int des3; unsigned int des3;
......
...@@ -232,6 +232,7 @@ static void enh_desc_init_rx_desc(struct dma_desc *p, unsigned int ring_size, ...@@ -232,6 +232,7 @@ static void enh_desc_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
{ {
int i; int i;
for (i = 0; i < ring_size; i++) { for (i = 0; i < ring_size; i++) {
p->des01.all_flags = 0;
p->des01.erx.own = 1; p->des01.erx.own = 1;
p->des01.erx.buffer1_size = BUF_SIZE_8KiB - 1; p->des01.erx.buffer1_size = BUF_SIZE_8KiB - 1;
...@@ -248,7 +249,7 @@ static void enh_desc_init_tx_desc(struct dma_desc *p, unsigned int ring_size) ...@@ -248,7 +249,7 @@ static void enh_desc_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
int i; int i;
for (i = 0; i < ring_size; i++) { for (i = 0; i < ring_size; i++) {
p->des01.etx.own = 0; p->des01.all_flags = 0;
ehn_desc_tx_set_on_ring_chain(p, (i == ring_size - 1)); ehn_desc_tx_set_on_ring_chain(p, (i == ring_size - 1));
p++; p++;
} }
...@@ -271,6 +272,7 @@ static void enh_desc_set_tx_owner(struct dma_desc *p) ...@@ -271,6 +272,7 @@ static void enh_desc_set_tx_owner(struct dma_desc *p)
static void enh_desc_set_rx_owner(struct dma_desc *p) static void enh_desc_set_rx_owner(struct dma_desc *p)
{ {
p->des01.all_flags = 0;
p->des01.erx.own = 1; p->des01.erx.own = 1;
} }
......
...@@ -126,6 +126,7 @@ static void ndesc_init_rx_desc(struct dma_desc *p, unsigned int ring_size, ...@@ -126,6 +126,7 @@ static void ndesc_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
{ {
int i; int i;
for (i = 0; i < ring_size; i++) { for (i = 0; i < ring_size; i++) {
p->des01.all_flags = 0;
p->des01.rx.own = 1; p->des01.rx.own = 1;
p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1; p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1;
...@@ -141,7 +142,7 @@ static void ndesc_init_tx_desc(struct dma_desc *p, unsigned int ring_size) ...@@ -141,7 +142,7 @@ static void ndesc_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
{ {
int i; int i;
for (i = 0; i < ring_size; i++) { for (i = 0; i < ring_size; i++) {
p->des01.tx.own = 0; p->des01.all_flags = 0;
ndesc_tx_set_on_ring_chain(p, (i == (ring_size - 1))); ndesc_tx_set_on_ring_chain(p, (i == (ring_size - 1)));
p++; p++;
} }
...@@ -164,6 +165,7 @@ static void ndesc_set_tx_owner(struct dma_desc *p) ...@@ -164,6 +165,7 @@ static void ndesc_set_tx_owner(struct dma_desc *p)
static void ndesc_set_rx_owner(struct dma_desc *p) static void ndesc_set_rx_owner(struct dma_desc *p)
{ {
p->des01.all_flags = 0;
p->des01.rx.own = 1; p->des01.rx.own = 1;
} }
......
...@@ -424,19 +424,17 @@ static void init_dma_desc_rings(struct net_device *dev) ...@@ -424,19 +424,17 @@ static void init_dma_desc_rings(struct net_device *dev)
priv->rx_skbuff = priv->rx_skbuff =
kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL); kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
priv->dma_rx = priv->dma_rx =
(struct dma_desc *)dma_alloc_coherent(priv->device, (struct dma_desc *)dma_zalloc_coherent(priv->device, rxsize *
rxsize * sizeof(struct dma_desc),
sizeof(struct dma_desc), &priv->dma_rx_phy,
&priv->dma_rx_phy, GFP_KERNEL);
GFP_KERNEL);
priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize, priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
GFP_KERNEL); GFP_KERNEL);
priv->dma_tx = priv->dma_tx =
(struct dma_desc *)dma_alloc_coherent(priv->device, (struct dma_desc *)dma_zalloc_coherent(priv->device, txsize *
txsize * sizeof(struct dma_desc),
sizeof(struct dma_desc), &priv->dma_tx_phy,
&priv->dma_tx_phy, GFP_KERNEL);
GFP_KERNEL);
if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) { if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__); pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
......
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