Commit 182e5622 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] sn: machvec/pci.c clean up

From: Pat Gefre <pfg@sgi.com>

machvec/pci.c clean up
Other clean up related to above
parent ef180d91
/*
*
* SNI64 specific PCI support for SNI IO.
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -8,32 +7,15 @@
*
* Copyright (c) 1997, 1998, 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/config.h>
#include <linux/pci.h>
#include <asm/sn/types.h>
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/driver.h>
#include <asm/sn/iograph.h>
#include <asm/param.h>
#include <asm/sn/pio.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/pci/pciio.h>
#include <asm/sn/pci/pcibr.h>
#include <asm/sn/pci/pcibr_private.h>
#include <asm/sn/pci/bridge.h>
/*
* These routines are only used during sn_pci_init for probing each bus, and
* can probably be removed with a little more cleanup now that the SAL routines
* work on sn2.
*/
extern vertex_hdl_t devfn_to_vertex(unsigned char bus, unsigned char devfn);
int sn_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
......
......@@ -21,10 +21,10 @@ extern void init_all_devices(void);
extern void klhwg_add_all_modules(vertex_hdl_t);
extern void klhwg_add_all_nodes(vertex_hdl_t);
extern int init_hcl(void);
extern vertex_hdl_t hwgraph_root;
extern void io_module_init(void);
extern int pci_bus_to_hcl_cvlink(void);
extern void mlreset(void);
/* #define DEBUG_IO_INIT 1 */
#ifdef DEBUG_IO_INIT
......@@ -43,15 +43,15 @@ extern void mlreset(void);
*
*/
void
irix_io_init(void)
void __init
sgi_master_io_infr_init(void)
{
cnodeid_t cnode;
/*
* This is the Master CPU. Emulate mlsetup and main.c in Irix.
*/
mlreset();
if (init_hcl() < 0) { /* Sets up the hwgraph compatibility layer */
printk("sgi_master_io_infr_init: Cannot init hcl\n");
return;
}
/*
* Initialize platform-dependent vertices in the hwgraph:
......@@ -74,8 +74,6 @@ irix_io_init(void)
per_hub_init(cnode);
}
/* We can do headless hub cnodes here .. */
/*
*
* Our IO Infrastructure drivers are in place ..
......
......@@ -37,15 +37,6 @@ char master_baseio_wid;
static char console_wid;
static char console_pcislot;
void
set_master_bridge_base(void)
{
console_wid = WIDGETID_GET(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base);
console_pcislot = KL_CONFIG_CH_CONS_INFO(master_nasid)->npci;
master_bridge_base = (__psunsigned_t)NODE_SWIN_BASE(console_nasid, console_wid);
// FIXME("WARNING: set_master_bridge_base: NON NASID 0 DOES NOT WORK\n");
}
int
check_nasid_equiv(nasid_t nasida, nasid_t nasidb)
{
......
......@@ -23,46 +23,10 @@ int maxcpus;
extern xwidgetnum_t hub_widget_id(nasid_t);
extern void iograph_early_init(void);
nasid_t master_nasid = INVALID_NASID; /* This is the partition master nasid */
nasid_t master_baseio_nasid = INVALID_NASID; /* This is the master base I/O nasid */
/*
* mlreset(void)
* very early machine reset - at this point NO interrupts have been
* enabled; nor is memory, tlb, p0, etc setup.
*
* slave is zero when mlreset is called for the master processor and
* is nonzero thereafter.
*/
void
mlreset(int slave)
{
/*
* We are the master cpu and node.
*/
master_nasid = get_nasid();
set_master_bridge_base();
/* We're the master processor */
master_procid = smp_processor_id();
master_nasid = cpuid_to_nasid(master_procid);
/*
* master_nasid we get back better be same as one from
* get_nasid()
*/
ASSERT_ALWAYS(master_nasid == get_nasid());
/* early initialization of iograph */
iograph_early_init();
}
/* XXX - Move the meat of this to intr.c ? */
/*
* Set up the platform-dependent fields in the nodepda.
......
......@@ -238,38 +238,6 @@ assign_widgets_to_volunteers(vertex_hdl_t xswitch, vertex_hdl_t hubv)
xswitch_volunteer_delete(xswitch);
}
/*
* Early iograph initialization. Called by master CPU in mlreset().
* Useful for including iograph.o in kernel.o.
*/
void
iograph_early_init(void)
{
/*
* Need new way to get this information ..
*/
cnodeid_t cnode;
nasid_t nasid;
lboard_t *board;
/*
* Init. the board-to-hwgraph link early, so FRU analyzer
* doesn't trip on leftover values if we panic early on.
*/
for(cnode = 0; cnode < numnodes; cnode++) {
nasid = COMPACT_TO_NASID_NODEID(cnode);
board = (lboard_t *)KL_CONFIG_INFO(nasid);
DBG("iograph_early_init: Found board 0x%p\n", board);
/* Check out all the board info stored on a node */
while(board) {
board->brd_graph_link = GRAPH_VERTEX_NONE;
board = KLCF_NEXT(board);
DBG("iograph_early_init: Found board 0x%p\n", board);
}
}
}
/*
* Probe to see if this hub's xtalk link is active. If so,
* return the Crosstalk Identification of the widget that we talk to.
......@@ -837,8 +805,6 @@ init_all_devices(void)
}
#define toint(x) ((int)(x) - (int)('0'))
static
struct io_brick_map_s io_brick_tab[] = {
......
......@@ -21,7 +21,6 @@ extern void mem_init(void);
extern void cpu_unenable(cpuid_t);
extern nasid_t get_lowest_nasid(void);
extern __psunsigned_t get_master_bridge_base(void);
extern void set_master_bridge_base(void);
extern int check_nasid_equiv(nasid_t, nasid_t);
extern nasid_t get_console_nasid(void);
extern char get_console_pcislot(void);
......
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