Commit 1a4bb93f authored by Alexander Popov's avatar Alexander Popov Committed by Anatolij Gustschin

powerpc/512x: add LocalPlus Bus FIFO device driver

This driver for Freescale MPC512x LocalPlus Bus FIFO (called SCLPC
in the Reference Manual) allows Direct Memory Access transfers
between RAM and peripheral devices on LocalPlus Bus.
Signed-off-by: default avatarAlexander Popov <alex.popov@linux.com>
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
parent 7e610890
......@@ -112,6 +112,7 @@ CONFIG_RTC_DRV_M41T80=y
CONFIG_RTC_DRV_MPC5121=y
CONFIG_DMADEVICES=y
CONFIG_MPC512X_DMA=y
CONFIG_MPC512x_LPBFIFO=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
......
......@@ -60,4 +60,63 @@ struct mpc512x_lpc {
int mpc512x_cs_config(unsigned int cs, u32 val);
/*
* SCLPC Module (LPB FIFO)
*/
struct mpc512x_lpbfifo {
u32 pkt_size; /* SCLPC Packet Size Register */
u32 start_addr; /* SCLPC Start Address Register */
u32 ctrl; /* SCLPC Control Register */
u32 enable; /* SCLPC Enable Register */
u32 reserved1;
u32 status; /* SCLPC Status Register */
u32 bytes_done; /* SCLPC Bytes Done Register */
u32 emb_sc; /* EMB Share Counter Register */
u32 emb_pc; /* EMB Pause Control Register */
u32 reserved2[7];
u32 data_word; /* LPC RX/TX FIFO Data Word Register */
u32 fifo_status; /* LPC RX/TX FIFO Status Register */
u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */
u32 fifo_alarm; /* LPC RX/TX FIFO Alarm Register */
};
#define MPC512X_SCLPC_START (1 << 31)
#define MPC512X_SCLPC_CS(x) (((x) & 0x7) << 24)
#define MPC512X_SCLPC_FLUSH (1 << 17)
#define MPC512X_SCLPC_READ (1 << 16)
#define MPC512X_SCLPC_DAI (1 << 8)
#define MPC512X_SCLPC_BPT(x) ((x) & 0x3f)
#define MPC512X_SCLPC_RESET (1 << 24)
#define MPC512X_SCLPC_FIFO_RESET (1 << 16)
#define MPC512X_SCLPC_ABORT_INT_ENABLE (1 << 9)
#define MPC512X_SCLPC_NORM_INT_ENABLE (1 << 8)
#define MPC512X_SCLPC_ENABLE (1 << 0)
#define MPC512X_SCLPC_SUCCESS (1 << 24)
#define MPC512X_SCLPC_FIFO_CTRL(x) (((x) & 0x7) << 24)
#define MPC512X_SCLPC_FIFO_ALARM(x) ((x) & 0x3ff)
enum lpb_dev_portsize {
LPB_DEV_PORTSIZE_UNDEFINED = 0,
LPB_DEV_PORTSIZE_1_BYTE = 1,
LPB_DEV_PORTSIZE_2_BYTES = 2,
LPB_DEV_PORTSIZE_4_BYTES = 4,
LPB_DEV_PORTSIZE_8_BYTES = 8
};
enum mpc512x_lpbfifo_req_dir {
MPC512X_LPBFIFO_REQ_DIR_READ,
MPC512X_LPBFIFO_REQ_DIR_WRITE
};
struct mpc512x_lpbfifo_request {
phys_addr_t dev_phys_addr; /* physical address of some device on LPB */
void *ram_virt_addr; /* virtual address of some region in RAM */
u32 size;
enum lpb_dev_portsize portsize;
enum mpc512x_lpbfifo_req_dir dir;
void (*callback)(struct mpc512x_lpbfifo_request *);
};
int mpc512x_lpbfifo_submit(struct mpc512x_lpbfifo_request *req);
#endif /* __ASM_POWERPC_MPC5121_H__ */
......@@ -10,6 +10,12 @@ config PPC_MPC512x
select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
config MPC512x_LPBFIFO
tristate "MPC512x LocalPlus Bus FIFO driver"
depends on PPC_MPC512x && MPC512X_DMA
help
Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
config MPC5121_ADS
bool "Freescale MPC5121E ADS"
depends on PPC_MPC512x
......
......@@ -5,4 +5,5 @@ obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o
obj-y += mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
obj-$(CONFIG_MPC512x_LPBFIFO) += mpc512x_lpbfifo.o
obj-$(CONFIG_PDM360NG) += pdm360ng.o
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