Commit 1b46cbe0 authored by Glauber de Oliveira Costa's avatar Glauber de Oliveira Costa Committed by Ingo Molnar

x86: unify paravirt pieces of processor.h

This patch unifies the paravirt pieces of processor.h
The functionality present in 32 bit, but not (yet) in 64-bit,
like load_sp0 is _not_ done here, and let to a different patch.

With this unification, we get paravirt for free in x86_64 processor.h
Signed-off-by: default avatarGlauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent c72dcf83
...@@ -29,9 +29,97 @@ static inline void load_cr3(pgd_t *pgdir) ...@@ -29,9 +29,97 @@ static inline void load_cr3(pgd_t *pgdir)
# include "processor_64.h" # include "processor_64.h"
#endif #endif
static inline unsigned long native_get_debugreg(int regno)
{
unsigned long val = 0; /* Damn you, gcc! */
switch (regno) {
case 0:
asm("mov %%db0, %0" :"=r" (val)); break;
case 1:
asm("mov %%db1, %0" :"=r" (val)); break;
case 2:
asm("mov %%db2, %0" :"=r" (val)); break;
case 3:
asm("mov %%db3, %0" :"=r" (val)); break;
case 6:
asm("mov %%db6, %0" :"=r" (val)); break;
case 7:
asm("mov %%db7, %0" :"=r" (val)); break;
default:
BUG();
}
return val;
}
static inline void native_set_debugreg(int regno, unsigned long value)
{
switch (regno) {
case 0:
asm("mov %0,%%db0" : /* no output */ :"r" (value));
break;
case 1:
asm("mov %0,%%db1" : /* no output */ :"r" (value));
break;
case 2:
asm("mov %0,%%db2" : /* no output */ :"r" (value));
break;
case 3:
asm("mov %0,%%db3" : /* no output */ :"r" (value));
break;
case 6:
asm("mov %0,%%db6" : /* no output */ :"r" (value));
break;
case 7:
asm("mov %0,%%db7" : /* no output */ :"r" (value));
break;
default:
BUG();
}
}
#ifndef CONFIG_PARAVIRT #ifndef CONFIG_PARAVIRT
#define __cpuid native_cpuid #define __cpuid native_cpuid
#endif #define paravirt_enabled() 0
/*
* These special macros can be used to get or set a debugging register
*/
#define get_debugreg(var, register) \
(var) = native_get_debugreg(register)
#define set_debugreg(value, register) \
native_set_debugreg(register, value)
#endif /* CONFIG_PARAVIRT */
/*
* Save the cr4 feature set we're using (ie
* Pentium 4MB enable and PPro Global page
* enable), so that any CPU's that boot up
* after us can get the correct flags.
*/
extern unsigned long mmu_cr4_features;
static inline void set_in_cr4(unsigned long mask)
{
unsigned cr4;
mmu_cr4_features |= mask;
cr4 = read_cr4();
cr4 |= mask;
write_cr4(cr4);
}
static inline void clear_in_cr4(unsigned long mask)
{
unsigned cr4;
mmu_cr4_features &= ~mask;
cr4 = read_cr4();
cr4 &= ~mask;
write_cr4(cr4);
}
/* /*
* Generic CPUID function * Generic CPUID function
......
...@@ -120,33 +120,6 @@ extern void detect_ht(struct cpuinfo_x86 *c); ...@@ -120,33 +120,6 @@ extern void detect_ht(struct cpuinfo_x86 *c);
static inline void detect_ht(struct cpuinfo_x86 *c) {} static inline void detect_ht(struct cpuinfo_x86 *c) {}
#endif #endif
/*
* Save the cr4 feature set we're using (ie
* Pentium 4MB enable and PPro Global page
* enable), so that any CPU's that boot up
* after us can get the correct flags.
*/
extern unsigned long mmu_cr4_features;
static inline void set_in_cr4 (unsigned long mask)
{
unsigned cr4;
mmu_cr4_features |= mask;
cr4 = read_cr4();
cr4 |= mask;
write_cr4(cr4);
}
static inline void clear_in_cr4 (unsigned long mask)
{
unsigned cr4;
mmu_cr4_features &= ~mask;
cr4 = read_cr4();
cr4 &= ~mask;
write_cr4(cr4);
}
/* Stop speculative execution */ /* Stop speculative execution */
static inline void sync_core(void) static inline void sync_core(void)
{ {
...@@ -482,57 +455,6 @@ static inline void native_load_sp0(struct tss_struct *tss, struct thread_struct ...@@ -482,57 +455,6 @@ static inline void native_load_sp0(struct tss_struct *tss, struct thread_struct
wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
} }
} }
static inline unsigned long native_get_debugreg(int regno)
{
unsigned long val = 0; /* Damn you, gcc! */
switch (regno) {
case 0:
asm("movl %%db0, %0" :"=r" (val)); break;
case 1:
asm("movl %%db1, %0" :"=r" (val)); break;
case 2:
asm("movl %%db2, %0" :"=r" (val)); break;
case 3:
asm("movl %%db3, %0" :"=r" (val)); break;
case 6:
asm("movl %%db6, %0" :"=r" (val)); break;
case 7:
asm("movl %%db7, %0" :"=r" (val)); break;
default:
BUG();
}
return val;
}
static inline void native_set_debugreg(int regno, unsigned long value)
{
switch (regno) {
case 0:
asm("movl %0,%%db0" : /* no output */ :"r" (value));
break;
case 1:
asm("movl %0,%%db1" : /* no output */ :"r" (value));
break;
case 2:
asm("movl %0,%%db2" : /* no output */ :"r" (value));
break;
case 3:
asm("movl %0,%%db3" : /* no output */ :"r" (value));
break;
case 6:
asm("movl %0,%%db6" : /* no output */ :"r" (value));
break;
case 7:
asm("movl %0,%%db7" : /* no output */ :"r" (value));
break;
default:
BUG();
}
}
/* /*
* Set IOPL bits in EFLAGS from given mask * Set IOPL bits in EFLAGS from given mask
*/ */
...@@ -552,21 +474,12 @@ static inline void native_set_iopl_mask(unsigned mask) ...@@ -552,21 +474,12 @@ static inline void native_set_iopl_mask(unsigned mask)
#ifdef CONFIG_PARAVIRT #ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h> #include <asm/paravirt.h>
#else #else
#define paravirt_enabled() 0
static inline void load_sp0(struct tss_struct *tss, struct thread_struct *thread) static inline void load_sp0(struct tss_struct *tss, struct thread_struct *thread)
{ {
native_load_sp0(tss, thread); native_load_sp0(tss, thread);
} }
/*
* These special macros can be used to get or set a debugging register
*/
#define get_debugreg(var, register) \
(var) = native_get_debugreg(register)
#define set_debugreg(value, register) \
native_set_debugreg(register, value)
#define set_iopl_mask native_set_iopl_mask #define set_iopl_mask native_set_iopl_mask
#endif /* CONFIG_PARAVIRT */ #endif /* CONFIG_PARAVIRT */
......
...@@ -88,34 +88,6 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); ...@@ -88,34 +88,6 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
extern unsigned short num_cache_leaves; extern unsigned short num_cache_leaves;
/*
* Save the cr4 feature set we're using (ie
* Pentium 4MB enable and PPro Global page
* enable), so that any CPU's that boot up
* after us can get the correct flags.
*/
extern unsigned long mmu_cr4_features;
static inline void set_in_cr4 (unsigned long mask)
{
mmu_cr4_features |= mask;
__asm__("movq %%cr4,%%rax\n\t"
"orq %0,%%rax\n\t"
"movq %%rax,%%cr4\n"
: : "irg" (mask)
:"ax");
}
static inline void clear_in_cr4 (unsigned long mask)
{
mmu_cr4_features &= ~mask;
__asm__("movq %%cr4,%%rax\n\t"
"andq %0,%%rax\n\t"
"movq %%rax,%%cr4\n"
: : "irg" (~mask)
:"ax");
}
/* /*
* User space process size. 47bits minus one guard page. * User space process size. 47bits minus one guard page.
...@@ -254,14 +226,6 @@ struct thread_struct { ...@@ -254,14 +226,6 @@ struct thread_struct {
set_fs(USER_DS); \ set_fs(USER_DS); \
} while(0) } while(0)
#define get_debugreg(var, register) \
__asm__("movq %%db" #register ", %0" \
:"=r" (var))
#define set_debugreg(value, register) \
__asm__("movq %0,%%db" #register \
: /* no output */ \
:"r" (value))
struct task_struct; struct task_struct;
struct mm_struct; struct mm_struct;
......
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