Commit 1bf93504 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'renesas-arm64-dt2-for-v4.19' of...

Merge tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM64 Based SoC DT Updates for v4.19

Corrections:

* Remove non-existing STBE region from Ether-AVB node in DT of
  R-Car E3 (r8a77990) SoC

Cleanups:

* Consistently use rwdt as label for Renesas Watchdog Timer devices
* Add second port to rcar_sound placeholder in DT of R-Car M3-N (r8a77965) SoC
* Fix adv7482 decimal unit addresses in DT of Salvator-X and -XS boards

Enhancements:

* Describe in DT:
  - INTC-EX of R-Car V3H (r8a77980) SoC
  - USB3.0 of R-Car E3 (r8a77980) SoC
  - All SCIF and HSCIF devices of R-Car D3 (r8a77995) SoC.
    Previously only SCIF2, used as the debug consile, was described.
  - All IPMMU devicesof R-Car M3-N (r8a77965), V3H (r8a77980) and
    E3 (r8a77990) SoCs
* Enable USB3.0 in DT of R-Car E3 (r8a77980) based Ebisu board
* Prefer HSCIF1 over SCIF1 in DT of Salvator-X and -XS boards

* tag 'renesas-arm64-dt2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: renesas: r8a77980: add INTC-EX support
  arm64: dts: renesas: r8a77990: Enable USB3.0 host for Ebisu board
  arm64: dts: renesas: r8a77995: Add SCIF {0,1,3,4,5} and all HSCIF device nodes
  arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes
  arm64: dts: renesas: Unify the labels for RWDT
  arm64: dts: renesas: salvator-common: Prefer HSCIF1 over SCIF1
  arm64: dts: renesas: r8a77965: Add second port to rcar_sound placeholder
  arm64: dts: renesas: salvator-common: Fix adv7482 decimal unit addresses
  arm64: dts: renesas: r8a77990: Remove non-existing STBE region
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d15d9e32 9a6c158f
...@@ -288,7 +288,7 @@ soc: soc { ...@@ -288,7 +288,7 @@ soc: soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
wdt0: watchdog@e6020000 { rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>; reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>; clocks = <&cpg CPG_MOD 402>;
......
...@@ -266,7 +266,7 @@ soc { ...@@ -266,7 +266,7 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
wdt0: watchdog@e6020000 { rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7796-wdt", compatible = "renesas,r8a7796-wdt",
"renesas,rcar-gen3-wdt"; "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>; reg = <0 0xe6020000 0 0x0c>;
......
...@@ -138,7 +138,7 @@ soc { ...@@ -138,7 +138,7 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
wdt0: watchdog@e6020000 { rwdt: watchdog@e6020000 {
compatible = "renesas,r8a77965-wdt", compatible = "renesas,r8a77965-wdt",
"renesas,rcar-gen3-wdt"; "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>; reg = <0 0xe6020000 0 0x0c>;
...@@ -704,6 +704,95 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH ...@@ -704,6 +704,95 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
dma-channels = <16>; dma-channels = <16>;
}; };
ipmmu_ds0: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A77965_PD_A3IR>;
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77965_PD_A3VC>;
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
power-domains = <&sysc R8A77965_PD_A3VP>;
#iommu-cells = <1>;
};
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77965", compatible = "renesas,etheravb-r8a77965",
"renesas,etheravb-rcar-gen3"; "renesas,etheravb-rcar-gen3";
...@@ -1269,6 +1358,9 @@ ports { ...@@ -1269,6 +1358,9 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
}; };
port@1 {
reg = <1>;
};
}; };
}; };
......
...@@ -234,6 +234,22 @@ sysc: system-controller@e6180000 { ...@@ -234,6 +234,22 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>; #power-domain-cells = <1>;
}; };
intc_ex: interrupt-controller@e61c0000 {
compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
i2c0: i2c@e6500000 { i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a77980", compatible = "renesas,i2c-r8a77980",
"renesas,rcar-gen3-i2c"; "renesas,rcar-gen3-i2c";
...@@ -427,6 +443,69 @@ channel1 { ...@@ -427,6 +443,69 @@ channel1 {
}; };
}; };
ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vip0: mmu@e7b00000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7b00000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vip1: mmu@e7960000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7960000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A77980_PD_A3IR>;
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77980", compatible = "renesas,etheravb-r8a77980",
"renesas,etheravb-rcar-gen3"; "renesas,etheravb-rcar-gen3";
......
...@@ -71,6 +71,11 @@ usb0_pins: usb { ...@@ -71,6 +71,11 @@ usb0_pins: usb {
groups = "usb0_b"; groups = "usb0_b";
function = "usb0"; function = "usb0";
}; };
usb30_pins: usb30 {
groups = "usb30";
function = "usb30";
};
}; };
&rwdt { &rwdt {
...@@ -88,3 +93,10 @@ &usb2_phy0 { ...@@ -88,3 +93,10 @@ &usb2_phy0 {
status = "okay"; status = "okay";
}; };
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
status = "okay";
};
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77990-sysc.h>
/ { / {
compatible = "renesas,r8a77990"; compatible = "renesas,r8a77990";
...@@ -210,10 +211,91 @@ sysc: system-controller@e6180000 { ...@@ -210,10 +211,91 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>; #power-domain-cells = <1>;
}; };
ipmmu_ds0: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77990_PD_A3VC>;
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77990", compatible = "renesas,etheravb-r8a77990",
"renesas,etheravb-rcar-gen3"; "renesas,etheravb-rcar-gen3";
reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; reg = <0 0xe6800000 0 0x800>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
...@@ -267,6 +349,17 @@ scif2: serial@e6e88000 { ...@@ -267,6 +349,17 @@ scif2: serial@e6e88000 {
status = "disabled"; status = "disabled";
}; };
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a77990",
"renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 328>;
status = "disabled";
};
ohci0: usb@ee080000 { ohci0: usb@ee080000 {
compatible = "generic-ohci"; compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>; reg = <0 0xee080000 0 0x100>;
......
...@@ -242,6 +242,41 @@ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH ...@@ -242,6 +242,41 @@ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 407>; resets = <&cpg 407>;
}; };
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a77995",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe6540000 0 0x60>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
<&dmac2 0x31>, <&dmac2 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 520>;
status = "disabled";
};
hscif3: serial@e66a0000 {
compatible = "renesas,hscif-r8a77995",
"renesas,rcar-gen3-hscif",
"renesas,hscif";
reg = <0 0xe66a0000 0 0x60>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 517>;
status = "disabled";
};
i2c0: i2c@e6500000 { i2c0: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -605,6 +640,40 @@ pwm3: pwm@e6e33000 { ...@@ -605,6 +640,40 @@ pwm3: pwm@e6e33000 {
status = "disabled"; status = "disabled";
}; };
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 207>;
status = "disabled";
};
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 206>;
status = "disabled";
};
scif2: serial@e6e88000 { scif2: serial@e6e88000 {
compatible = "renesas,scif-r8a77995", compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif"; "renesas,rcar-gen3-scif", "renesas,scif";
...@@ -622,6 +691,55 @@ scif2: serial@e6e88000 { ...@@ -622,6 +691,55 @@ scif2: serial@e6e88000 {
status = "disabled"; status = "disabled";
}; };
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 204>;
status = "disabled";
};
scif4: serial@e6c40000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled";
};
scif5: serial@e6f30000 {
compatible = "renesas,scif-r8a77995",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>,
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
<&dmac2 0x5b>, <&dmac2 0x5a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
};
msiof0: spi@e6e90000 { msiof0: spi@e6e90000 {
compatible = "renesas,msiof-r8a77995", compatible = "renesas,msiof-r8a77995",
"renesas,rcar-gen3-msiof"; "renesas,rcar-gen3-msiof";
......
...@@ -33,7 +33,7 @@ ...@@ -33,7 +33,7 @@
/ { / {
aliases { aliases {
serial0 = &scif2; serial0 = &scif2;
serial1 = &scif1; serial1 = &hscif1;
ethernet0 = &avb; ethernet0 = &avb;
}; };
...@@ -344,7 +344,7 @@ &hscif1 { ...@@ -344,7 +344,7 @@ &hscif1 {
uart-has-rtscts; uart-has-rtscts;
/* Please only enable hscif1 or scif1 */ /* Please only enable hscif1 or scif1 */
/* status = "okay"; */ status = "okay";
}; };
&hsusb { &hsusb {
...@@ -446,7 +446,7 @@ adv7482_hdmi: endpoint { ...@@ -446,7 +446,7 @@ adv7482_hdmi: endpoint {
}; };
}; };
port@10 { port@a {
reg = <10>; reg = <10>;
adv7482_txa: endpoint { adv7482_txa: endpoint {
...@@ -456,7 +456,7 @@ adv7482_txa: endpoint { ...@@ -456,7 +456,7 @@ adv7482_txa: endpoint {
}; };
}; };
port@11 { port@b {
reg = <11>; reg = <11>;
adv7482_txb: endpoint { adv7482_txb: endpoint {
...@@ -723,7 +723,7 @@ &scif1 { ...@@ -723,7 +723,7 @@ &scif1 {
uart-has-rtscts; uart-has-rtscts;
/* Please only enable hscif1 or scif1 */ /* Please only enable hscif1 or scif1 */
status = "okay"; /* status = "okay"; */
}; };
&scif2 { &scif2 {
...@@ -850,7 +850,7 @@ &vin7 { ...@@ -850,7 +850,7 @@ &vin7 {
status = "okay"; status = "okay";
}; };
&wdt0 { &rwdt {
timeout-sec = <60>; timeout-sec = <60>;
status = "okay"; status = "okay";
}; };
......
...@@ -444,7 +444,7 @@ &usb2_phy1 { ...@@ -444,7 +444,7 @@ &usb2_phy1 {
status = "okay"; status = "okay";
}; };
&wdt0 { &rwdt {
timeout-sec = <60>; timeout-sec = <60>;
status = "okay"; status = "okay";
}; };
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