Commit 1e1a139d authored by Matt Roper's avatar Matt Roper

drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl

WaDisableDARBFClkGating, now known as Wa_14010480278, has been added to
the workaround tables for ICL, EHL, and TGL so we need to extend our
platform test accordingly.

Bspec: 33450
Bspec: 33451
Bspec: 52890
Cc: stable@kernel.vger.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224012026.3157766-2-matthew.d.roper@intel.comReviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 6ea578a5
...@@ -17928,8 +17928,11 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv) ...@@ -17928,8 +17928,11 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv)
static void intel_early_display_was(struct drm_i915_private *dev_priv) static void intel_early_display_was(struct drm_i915_private *dev_priv)
{ {
/* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */ /*
if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) * Display WA #1185 WaDisableDARBFClkGating:cnl,glk,icl,ehl,tgl
* Also known as Wa_14010480278.
*/
if (IS_GEN_RANGE(dev_priv, 10, 12) || IS_GEMINILAKE(dev_priv))
I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) | I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
DARBF_GATING_DIS); DARBF_GATING_DIS);
......
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