Commit 1f44febf authored by Thierry Reding's avatar Thierry Reding

soc/tegra: fuse: Add Tegra234 support

Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.
Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 52e6d399
...@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) { ...@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
}; };
static const struct of_device_id tegra_fuse_match[] = { static const struct of_device_id tegra_fuse_match[] = {
#ifdef CONFIG_ARCH_TEGRA_234_SOC
{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
#endif
#ifdef CONFIG_ARCH_TEGRA_194_SOC #ifdef CONFIG_ARCH_TEGRA_194_SOC
{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc }, { .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
#endif #endif
...@@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = { ...@@ -326,7 +329,8 @@ const struct attribute_group tegra_soc_attr_group = {
.attrs = tegra_soc_attr, .attrs = tegra_soc_attr,
}; };
#ifdef CONFIG_ARCH_TEGRA_194_SOC #if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
static ssize_t platform_show(struct device *dev, struct device_attribute *attr, static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
char *buf) char *buf)
{ {
......
...@@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = { ...@@ -356,3 +356,33 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
.soc_attr_group = &tegra194_soc_attr_group, .soc_attr_group = &tegra194_soc_attr_group,
}; };
#endif #endif
#if defined(CONFIG_ARCH_TEGRA_234_SOC)
static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = {
{
.nvmem_name = "fuse",
.cell_name = "xusb-pad-calibration",
.dev_id = "3520000.padctl",
.con_id = "calibration",
}, {
.nvmem_name = "fuse",
.cell_name = "xusb-pad-calibration-ext",
.dev_id = "3520000.padctl",
.con_id = "calibration-ext",
},
};
static const struct tegra_fuse_info tegra234_fuse_info = {
.read = tegra30_fuse_read,
.size = 0x300,
.spare = 0x280,
};
const struct tegra_fuse_soc tegra234_fuse_soc = {
.init = tegra30_fuse_init,
.info = &tegra234_fuse_info,
.lookups = tegra234_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra234_fuse_lookups),
.soc_attr_group = &tegra194_soc_attr_group,
};
#endif
...@@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc; ...@@ -115,9 +115,17 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
extern const struct tegra_fuse_soc tegra186_fuse_soc; extern const struct tegra_fuse_soc tegra186_fuse_soc;
#endif #endif
#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
extern const struct attribute_group tegra194_soc_attr_group;
#endif
#ifdef CONFIG_ARCH_TEGRA_194_SOC #ifdef CONFIG_ARCH_TEGRA_194_SOC
extern const struct tegra_fuse_soc tegra194_fuse_soc; extern const struct tegra_fuse_soc tegra194_fuse_soc;
extern const struct attribute_group tegra194_soc_attr_group; #endif
#ifdef CONFIG_ARCH_TEGRA_234_SOC
extern const struct tegra_fuse_soc tegra234_fuse_soc;
#endif #endif
#endif #endif
...@@ -56,6 +56,7 @@ bool tegra_is_silicon(void) ...@@ -56,6 +56,7 @@ bool tegra_is_silicon(void)
{ {
switch (tegra_get_chip_id()) { switch (tegra_get_chip_id()) {
case TEGRA194: case TEGRA194:
case TEGRA234:
if (tegra_get_platform() == 0) if (tegra_get_platform() == 0)
return true; return true;
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#define TEGRA210 0x21 #define TEGRA210 0x21
#define TEGRA186 0x18 #define TEGRA186 0x18
#define TEGRA194 0x19 #define TEGRA194 0x19
#define TEGRA234 0x23
#define TEGRA_FUSE_SKU_CALIB_0 0xf0 #define TEGRA_FUSE_SKU_CALIB_0 0xf0
#define TEGRA30_FUSE_SATA_CALIB 0x124 #define TEGRA30_FUSE_SATA_CALIB 0x124
......
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