Commit 1fdfe8ca authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: drop dead vce powergate code

This was for Vega20. However Vega20 support is
already dropped from current swSMU.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7951e7c0
......@@ -461,9 +461,6 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
dev_err(smu->adev->dev, "Failed to power %s UVD!\n",
gate ? "gate" : "ungate");
break;
case AMD_IP_BLOCK_TYPE_VCE:
ret = smu_dpm_set_vce_enable(smu, !gate);
break;
case AMD_IP_BLOCK_TYPE_GFX:
ret = smu_gfx_off_control(smu, gate);
if (ret)
......@@ -483,7 +480,8 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
gate ? "gate" : "ungate");
break;
default:
break;
dev_err(smu->adev->dev, "Unsupported block type!\n");
return -EINVAL;
}
return ret;
......
......@@ -454,7 +454,6 @@ struct pptable_funcs {
int (*get_power_profile_mode)(struct smu_context *smu, char *buf);
int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);
int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable);
int (*dpm_set_vce_enable)(struct smu_context *smu, bool enable);
int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,
void *data, uint32_t *size);
......
......@@ -159,8 +159,6 @@ static inline int smu_send_smc_msg(struct smu_context *smu, enum smu_message_typ
#define smu_dpm_set_uvd_enable(smu, enable) \
((smu)->ppt_funcs->dpm_set_uvd_enable ? (smu)->ppt_funcs->dpm_set_uvd_enable((smu), (enable)) : 0)
#define smu_dpm_set_vce_enable(smu, enable) \
((smu)->ppt_funcs->dpm_set_vce_enable ? (smu)->ppt_funcs->dpm_set_vce_enable((smu), (enable)) : 0)
#define smu_dpm_set_jpeg_enable(smu, enable) \
((smu)->ppt_funcs->dpm_set_jpeg_enable ? (smu)->ppt_funcs->dpm_set_jpeg_enable((smu), (enable)) : 0)
......
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