Commit 2006058e authored by Chris Wilson's avatar Chris Wilson

drm/i915: Move the renderstate setup under gt/

The render state is used to initialise the default RCS context, and only
used during early setup from within the gt code. As such, it makes a
good candidate for placing within gt/, even if it is not yet entirely
clean of our GEM heritage.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190704091925.7391-1-chris@chris-wilson.co.uk
parent 06861089
......@@ -78,12 +78,19 @@ gt-y += \
gt/intel_gt_pm.o \
gt/intel_hangcheck.o \
gt/intel_lrc.o \
gt/intel_renderstate.o \
gt/intel_reset.o \
gt/intel_ringbuffer.o \
gt/intel_mocs.o \
gt/intel_sseu.o \
gt/intel_timeline.o \
gt/intel_workarounds.o
# autogenerated null render state
gt-y += \
gt/gen6_renderstate.o \
gt/gen7_renderstate.o \
gt/gen8_renderstate.o \
gt/gen9_renderstate.o
gt-$(CONFIG_DRM_I915_SELFTEST) += \
gt/mock_engine.o
i915-y += $(gt-y)
......@@ -123,7 +130,6 @@ i915-y += \
i915_gem_fence_reg.o \
i915_gem_gtt.o \
i915_gem.o \
i915_gem_render_state.o \
i915_globals.o \
i915_query.o \
i915_request.o \
......@@ -144,12 +150,6 @@ i915-y += intel_uc.o \
intel_huc.o \
intel_huc_fw.o
# autogenerated null render state
i915-y += intel_renderstate_gen6.o \
intel_renderstate_gen7.o \
intel_renderstate_gen8.o \
intel_renderstate_gen9.o
# modesetting core code
obj-y += display/
i915-y += \
......
......@@ -135,13 +135,13 @@
#include "gem/i915_gem_context.h"
#include "gt/intel_gt.h"
#include "i915_drv.h"
#include "i915_gem_render_state.h"
#include "i915_vgpu.h"
#include "intel_engine_pm.h"
#include "intel_gt.h"
#include "intel_lrc_reg.h"
#include "intel_mocs.h"
#include "intel_renderstate.h"
#include "intel_reset.h"
#include "intel_workarounds.h"
......@@ -2677,7 +2677,7 @@ static int gen8_init_rcs_context(struct i915_request *rq)
if (ret)
DRM_ERROR("MOCS failed to program: expect performance issues.\n");
return i915_gem_render_state_emit(rq);
return intel_renderstate_emit(rq);
}
static void execlists_park(struct intel_engine_cs *engine)
......
......@@ -26,10 +26,9 @@
*/
#include "i915_drv.h"
#include "i915_gem_render_state.h"
#include "intel_renderstate.h"
struct intel_render_state {
struct intel_renderstate {
const struct intel_renderstate_rodata *rodata;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
......@@ -75,7 +74,7 @@ render_state_get_rodata(const struct intel_engine_cs *engine)
(batch)[(i)++] = (val); \
} while(0)
static int render_state_setup(struct intel_render_state *so,
static int render_state_setup(struct intel_renderstate *so,
struct drm_i915_private *i915)
{
const struct intel_renderstate_rodata *rodata = so->rodata;
......@@ -177,10 +176,10 @@ static int render_state_setup(struct intel_render_state *so,
#undef OUT_BATCH
int i915_gem_render_state_emit(struct i915_request *rq)
int intel_renderstate_emit(struct i915_request *rq)
{
struct intel_engine_cs *engine = rq->engine;
struct intel_render_state so = {}; /* keep the compiler happy */
struct intel_renderstate so = {}; /* keep the compiler happy */
int err;
so.rodata = render_state_get_rodata(engine);
......
......@@ -21,11 +21,13 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef _INTEL_RENDERSTATE_H
#define _INTEL_RENDERSTATE_H
#ifndef _INTEL_RENDERSTATE_H_
#define _INTEL_RENDERSTATE_H_
#include <linux/types.h>
struct i915_request;
struct intel_renderstate_rodata {
const u32 *reloc;
const u32 *batch;
......@@ -44,4 +46,6 @@ extern const struct intel_renderstate_rodata gen7_null_state;
extern const struct intel_renderstate_rodata gen8_null_state;
extern const struct intel_renderstate_rodata gen9_null_state;
#endif /* INTEL_RENDERSTATE_H */
int intel_renderstate_emit(struct i915_request *rq);
#endif /* _INTEL_RENDERSTATE_H_ */
......@@ -33,12 +33,11 @@
#include "gem/i915_gem_context.h"
#include "gt/intel_gt.h"
#include "i915_drv.h"
#include "i915_gem_render_state.h"
#include "i915_trace.h"
#include "intel_context.h"
#include "intel_gt.h"
#include "intel_renderstate.h"
#include "intel_reset.h"
#include "intel_workarounds.h"
......@@ -813,7 +812,7 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
if (ret != 0)
return ret;
ret = i915_gem_render_state_emit(rq);
ret = intel_renderstate_emit(rq);
if (ret)
return ret;
......
/*
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef _I915_GEM_RENDER_STATE_H_
#define _I915_GEM_RENDER_STATE_H_
struct i915_request;
int i915_gem_render_state_emit(struct i915_request *rq);
#endif /* _I915_GEM_RENDER_STATE_H_ */
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