Commit 21770332 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few fixes that came in too late to make it into the first set of
  pull requests but would still be nice to have in -rc1.

  The majority of these are trivial build fixes for bugs that I found
  myself using randconfig testing, and a set of two patches from Uwe to
  mark DT strings as 'const' where appropriate, to resolve inconsistent
  section attributes"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: make of_device_ids const
  ARM: make arrays containing machine compatible strings const
  ARM: mm: Remove Kconfig symbol CACHE_PL310
  ARM: rockchip: force built-in regulator support for PM
  ARM: mvebu: build armada375-smp code conditionally
  ARM: sti: always enable RESET_CONTROLLER
  ARM: rockchip: make rockchip_suspend_init conditional
  ARM: ixp4xx: fix {in,out}s{bwl} data types
  ARM: prima2: do not select SMP_ON_UP
  ARM: at91: fix pm declarations
  ARM: davinci: multi-soc kernels require AUTO_ZRELADDR
  ARM: davinci: davinci_cfg_reg cannot be init
  ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile
  ARM: vexpress: use ARM_CPU_SUSPEND if needed
  ARM: dts: add I2C device nodes for Broadcom Cygnus
  ARM: dts: BCM63xx: fix L2 cache properties
parents c8c6c9ba 444d2d33
...@@ -70,6 +70,26 @@ wdt@18009000 { ...@@ -70,6 +70,26 @@ wdt@18009000 {
}; };
}; };
i2c0: i2c@18008000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x18008000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@1800b000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x1800b000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
uart0: serial@18020000 { uart0: serial@18020000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>; reg = <0x18020000 0x100>;
......
...@@ -66,8 +66,9 @@ L2: cache-controller@1d000 { ...@@ -66,8 +66,9 @@ L2: cache-controller@1d000 {
reg = <0x1d000 0x1000>; reg = <0x1d000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
cache-sets = <16>; cache-size = <524288>;
cache-size = <0x80000>; cache-sets = <1024>;
cache-line-size = <32>;
interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
}; };
......
...@@ -231,7 +231,7 @@ static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu) ...@@ -231,7 +231,7 @@ static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
/* /*
* PMU platform driver and devicetree bindings. * PMU platform driver and devicetree bindings.
*/ */
static struct of_device_id cpu_pmu_of_device_ids[] = { static const struct of_device_id cpu_pmu_of_device_ids[] = {
{.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init}, {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
{.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init}, {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
......
...@@ -64,7 +64,6 @@ config SOC_SAMA5D4 ...@@ -64,7 +64,6 @@ config SOC_SAMA5D4
select SOC_SAMA5 select SOC_SAMA5
select CLKSRC_MMIO select CLKSRC_MMIO
select CACHE_L2X0 select CACHE_L2X0
select CACHE_PL310
select HAVE_FB_ATMEL select HAVE_FB_ATMEL
select HAVE_AT91_UTMI select HAVE_AT91_UTMI
select HAVE_AT91_SMD select HAVE_AT91_SMD
......
...@@ -183,7 +183,7 @@ static struct clock_event_device clkevt = { ...@@ -183,7 +183,7 @@ static struct clock_event_device clkevt = {
void __iomem *at91_st_base; void __iomem *at91_st_base;
EXPORT_SYMBOL_GPL(at91_st_base); EXPORT_SYMBOL_GPL(at91_st_base);
static struct of_device_id at91rm9200_st_timer_ids[] = { static const struct of_device_id at91rm9200_st_timer_ids[] = {
{ .compatible = "atmel,at91rm9200-st" }, { .compatible = "atmel,at91rm9200-st" },
{ /* sentinel */ } { /* sentinel */ }
}; };
......
...@@ -35,10 +35,10 @@ extern void __init at91sam9260_pm_init(void); ...@@ -35,10 +35,10 @@ extern void __init at91sam9260_pm_init(void);
extern void __init at91sam9g45_pm_init(void); extern void __init at91sam9g45_pm_init(void);
extern void __init at91sam9x5_pm_init(void); extern void __init at91sam9x5_pm_init(void);
#else #else
void __init at91rm9200_pm_init(void) { } static inline void __init at91rm9200_pm_init(void) { }
void __init at91sam9260_pm_init(void) { } static inline void __init at91sam9260_pm_init(void) { }
void __init at91sam9g45_pm_init(void) { } static inline void __init at91sam9g45_pm_init(void) { }
void __init at91sam9x5_pm_init(void) { } static inline void __init at91sam9x5_pm_init(void) { }
#endif #endif
#endif /* _AT91_GENERIC_H */ #endif /* _AT91_GENERIC_H */
...@@ -226,7 +226,7 @@ void at91_pm_set_standby(void (*at91_standby)(void)) ...@@ -226,7 +226,7 @@ void at91_pm_set_standby(void (*at91_standby)(void))
} }
} }
static struct of_device_id ramc_ids[] = { static const struct of_device_id ramc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
...@@ -234,7 +234,7 @@ static struct of_device_id ramc_ids[] = { ...@@ -234,7 +234,7 @@ static struct of_device_id ramc_ids[] = {
{ /*sentinel*/ } { /*sentinel*/ }
}; };
static void at91_dt_ramc(void) static __init void at91_dt_ramc(void)
{ {
struct device_node *np; struct device_node *np;
const struct of_device_id *of_id; const struct of_device_id *of_id;
......
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
static const char *axxia_dt_match[] __initconst = { static const char *const axxia_dt_match[] __initconst = {
"lsi,axm5516", "lsi,axm5516",
"lsi,axm5516-sim", "lsi,axm5516-sim",
"lsi,axm5516-emu", "lsi,axm5516-emu",
......
...@@ -68,7 +68,7 @@ config ARCH_BCM_MOBILE ...@@ -68,7 +68,7 @@ config ARCH_BCM_MOBILE
This enables support for systems based on Broadcom mobile SoCs. This enables support for systems based on Broadcom mobile SoCs.
config ARCH_BCM_281XX config ARCH_BCM_281XX
bool "Broadcom BCM281XX SoC family" bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7
select ARCH_BCM_MOBILE select ARCH_BCM_MOBILE
select HAVE_SMP select HAVE_SMP
help help
...@@ -77,7 +77,7 @@ config ARCH_BCM_281XX ...@@ -77,7 +77,7 @@ config ARCH_BCM_281XX
variants. variants.
config ARCH_BCM_21664 config ARCH_BCM_21664
bool "Broadcom BCM21664 SoC family" bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7
select ARCH_BCM_MOBILE select ARCH_BCM_MOBILE
select HAVE_SMP select HAVE_SMP
help help
......
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
static const char *brcmstb_match[] __initconst = { static const char *const brcmstb_match[] __initconst = {
"brcm,bcm7445", "brcm,bcm7445",
"brcm,brcmstb", "brcm,brcmstb",
NULL NULL
......
...@@ -32,12 +32,14 @@ config ARCH_DAVINCI_DM646x ...@@ -32,12 +32,14 @@ config ARCH_DAVINCI_DM646x
config ARCH_DAVINCI_DA830 config ARCH_DAVINCI_DA830
bool "DA830/OMAP-L137/AM17x based system" bool "DA830/OMAP-L137/AM17x based system"
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
select ARCH_DAVINCI_DA8XX select ARCH_DAVINCI_DA8XX
select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
select CP_INTC select CP_INTC
config ARCH_DAVINCI_DA850 config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system" bool "DA850/OMAP-L138/AM18x based system"
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
select ARCH_DAVINCI_DA8XX select ARCH_DAVINCI_DA8XX
select CP_INTC select CP_INTC
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#define DA8XX_NUM_UARTS 3 #define DA8XX_NUM_UARTS 3
static struct of_device_id da8xx_irq_match[] __initdata = { static const struct of_device_id da8xx_irq_match[] __initconst = {
{ .compatible = "ti,cp-intc", .data = cp_intc_of_init, }, { .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
{ } { }
}; };
......
...@@ -30,7 +30,7 @@ static void __iomem *pinmux_base; ...@@ -30,7 +30,7 @@ static void __iomem *pinmux_base;
/* /*
* Sets the DAVINCI MUX register based on the table * Sets the DAVINCI MUX register based on the table
*/ */
int __init_or_module davinci_cfg_reg(const unsigned long index) int davinci_cfg_reg(const unsigned long index)
{ {
static DEFINE_SPINLOCK(mux_spin_lock); static DEFINE_SPINLOCK(mux_spin_lock);
struct davinci_soc_info *soc_info = &davinci_soc_info; struct davinci_soc_info *soc_info = &davinci_soc_info;
...@@ -101,7 +101,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) ...@@ -101,7 +101,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
} }
EXPORT_SYMBOL(davinci_cfg_reg); EXPORT_SYMBOL(davinci_cfg_reg);
int __init_or_module davinci_cfg_reg_list(const short pins[]) int davinci_cfg_reg_list(const short pins[])
{ {
int i, error = -EINVAL; int i, error = -EINVAL;
......
...@@ -227,7 +227,7 @@ static void __init exynos_dt_machine_init(void) ...@@ -227,7 +227,7 @@ static void __init exynos_dt_machine_init(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
} }
static char const *exynos_dt_compat[] __initconst = { static char const *const exynos_dt_compat[] __initconst = {
"samsung,exynos3", "samsung,exynos3",
"samsung,exynos3250", "samsung,exynos3250",
"samsung,exynos4", "samsung,exynos4",
......
...@@ -587,7 +587,7 @@ static struct exynos_pm_data exynos5420_pm_data = { ...@@ -587,7 +587,7 @@ static struct exynos_pm_data exynos5420_pm_data = {
.cpu_suspend = exynos5420_cpu_suspend, .cpu_suspend = exynos5420_cpu_suspend,
}; };
static struct of_device_id exynos_pmu_of_device_ids[] = { static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
{ {
.compatible = "samsung,exynos3250-pmu", .compatible = "samsung,exynos3250-pmu",
.data = &exynos3250_pm_data, .data = &exynos3250_pm_data,
......
...@@ -169,7 +169,7 @@ static void __init highbank_init(void) ...@@ -169,7 +169,7 @@ static void __init highbank_init(void)
platform_device_register(&highbank_cpuidle_device); platform_device_register(&highbank_cpuidle_device);
} }
static const char *highbank_match[] __initconst = { static const char *const highbank_match[] __initconst = {
"calxeda,highbank", "calxeda,highbank",
"calxeda,ecx-2000", "calxeda,ecx-2000",
NULL, NULL,
......
...@@ -45,7 +45,7 @@ static void __init hi3620_map_io(void) ...@@ -45,7 +45,7 @@ static void __init hi3620_map_io(void)
iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc)); iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
} }
static const char *hi3xxx_compat[] __initconst = { static const char *const hi3xxx_compat[] __initconst = {
"hisilicon,hi3620-hi4511", "hisilicon,hi3620-hi4511",
NULL, NULL,
}; };
...@@ -55,7 +55,7 @@ DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)") ...@@ -55,7 +55,7 @@ DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
.dt_compat = hi3xxx_compat, .dt_compat = hi3xxx_compat,
MACHINE_END MACHINE_END
static const char *hix5hd2_compat[] __initconst = { static const char *const hix5hd2_compat[] __initconst = {
"hisilicon,hix5hd2", "hisilicon,hix5hd2",
NULL, NULL,
}; };
...@@ -64,7 +64,7 @@ DT_MACHINE_START(HIX5HD2_DT, "Hisilicon HIX5HD2 (Flattened Device Tree)") ...@@ -64,7 +64,7 @@ DT_MACHINE_START(HIX5HD2_DT, "Hisilicon HIX5HD2 (Flattened Device Tree)")
.dt_compat = hix5hd2_compat, .dt_compat = hix5hd2_compat,
MACHINE_END MACHINE_END
static const char *hip04_compat[] __initconst = { static const char *const hip04_compat[] __initconst = {
"hisilicon,hip04-d01", "hisilicon,hip04-d01",
NULL, NULL,
}; };
...@@ -73,7 +73,7 @@ DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)") ...@@ -73,7 +73,7 @@ DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)")
.dt_compat = hip04_compat, .dt_compat = hip04_compat,
MACHINE_END MACHINE_END
static const char *hip01_compat[] __initconst = { static const char *const hip01_compat[] __initconst = {
"hisilicon,hip01", "hisilicon,hip01",
"hisilicon,hip01-ca9x2", "hisilicon,hip01-ca9x2",
NULL, NULL,
......
...@@ -68,7 +68,7 @@ int imx_mmdc_get_ddr_type(void) ...@@ -68,7 +68,7 @@ int imx_mmdc_get_ddr_type(void)
return ddr_type; return ddr_type;
} }
static struct of_device_id imx_mmdc_dt_ids[] = { static const struct of_device_id imx_mmdc_dt_ids[] = {
{ .compatible = "fsl,imx6q-mmdc", }, { .compatible = "fsl,imx6q-mmdc", },
{ /* sentinel */ } { /* sentinel */ }
}; };
......
...@@ -245,8 +245,10 @@ static inline void outb(u8 value, u32 addr) ...@@ -245,8 +245,10 @@ static inline void outb(u8 value, u32 addr)
} }
#define outsb outsb #define outsb outsb
static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count) static inline void outsb(u32 io_addr, const void *p, u32 count)
{ {
const u8 *vaddr = p;
while (count--) while (count--)
outb(*vaddr++, io_addr); outb(*vaddr++, io_addr);
} }
...@@ -262,8 +264,9 @@ static inline void outw(u16 value, u32 addr) ...@@ -262,8 +264,9 @@ static inline void outw(u16 value, u32 addr)
} }
#define outsw outsw #define outsw outsw
static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count) static inline void outsw(u32 io_addr, const void *p, u32 count)
{ {
const u16 *vaddr = p;
while (count--) while (count--)
outw(cpu_to_le16(*vaddr++), io_addr); outw(cpu_to_le16(*vaddr++), io_addr);
} }
...@@ -275,8 +278,9 @@ static inline void outl(u32 value, u32 addr) ...@@ -275,8 +278,9 @@ static inline void outl(u32 value, u32 addr)
} }
#define outsl outsl #define outsl outsl
static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count) static inline void outsl(u32 io_addr, const void *p, u32 count)
{ {
const u32 *vaddr = p;
while (count--) while (count--)
outl(cpu_to_le32(*vaddr++), io_addr); outl(cpu_to_le32(*vaddr++), io_addr);
} }
...@@ -294,8 +298,9 @@ static inline u8 inb(u32 addr) ...@@ -294,8 +298,9 @@ static inline u8 inb(u32 addr)
} }
#define insb insb #define insb insb
static inline void insb(u32 io_addr, u8 *vaddr, u32 count) static inline void insb(u32 io_addr, void *p, u32 count)
{ {
u8 *vaddr = p;
while (count--) while (count--)
*vaddr++ = inb(io_addr); *vaddr++ = inb(io_addr);
} }
...@@ -313,8 +318,9 @@ static inline u16 inw(u32 addr) ...@@ -313,8 +318,9 @@ static inline u16 inw(u32 addr)
} }
#define insw insw #define insw insw
static inline void insw(u32 io_addr, u16 *vaddr, u32 count) static inline void insw(u32 io_addr, void *p, u32 count)
{ {
u16 *vaddr = p;
while (count--) while (count--)
*vaddr++ = le16_to_cpu(inw(io_addr)); *vaddr++ = le16_to_cpu(inw(io_addr));
} }
...@@ -330,8 +336,9 @@ static inline u32 inl(u32 addr) ...@@ -330,8 +336,9 @@ static inline u32 inl(u32 addr)
} }
#define insl insl #define insl insl
static inline void insl(u32 io_addr, u32 *vaddr, u32 count) static inline void insl(u32 io_addr, void *p, u32 count)
{ {
u32 *vaddr = p;
while (count--) while (count--)
*vaddr++ = le32_to_cpu(inl(io_addr)); *vaddr++ = le32_to_cpu(inl(io_addr));
} }
......
...@@ -103,7 +103,7 @@ static void __init keystone_init_meminfo(void) ...@@ -103,7 +103,7 @@ static void __init keystone_init_meminfo(void)
pr_info("Switching to high address space at 0x%llx\n", (u64)offset); pr_info("Switching to high address space at 0x%llx\n", (u64)offset);
} }
static const char *keystone_match[] __initconst = { static const char *const keystone_match[] __initconst = {
"ti,keystone", "ti,keystone",
NULL, NULL,
}; };
......
...@@ -61,7 +61,7 @@ static struct pm_clk_notifier_block platform_domain_notifier = { ...@@ -61,7 +61,7 @@ static struct pm_clk_notifier_block platform_domain_notifier = {
.pm_domain = &keystone_pm_domain, .pm_domain = &keystone_pm_domain,
}; };
static struct of_device_id of_keystone_table[] = { static const struct of_device_id of_keystone_table[] = {
{.compatible = "ti,keystone"}, {.compatible = "ti,keystone"},
{ /* end of list */ }, { /* end of list */ },
}; };
......
...@@ -213,7 +213,7 @@ void __init timer_init(int irq) ...@@ -213,7 +213,7 @@ void __init timer_init(int irq)
} }
#ifdef CONFIG_OF #ifdef CONFIG_OF
static struct of_device_id mmp_timer_dt_ids[] = { static const struct of_device_id mmp_timer_dt_ids[] = {
{ .compatible = "mrvl,mmp-timer", }, { .compatible = "mrvl,mmp-timer", },
{} {}
}; };
......
...@@ -51,7 +51,7 @@ enum { ...@@ -51,7 +51,7 @@ enum {
COHERENCY_FABRIC_TYPE_ARMADA_380, COHERENCY_FABRIC_TYPE_ARMADA_380,
}; };
static struct of_device_id of_coherency_table[] = { static const struct of_device_id of_coherency_table[] = {
{.compatible = "marvell,coherency-fabric", {.compatible = "marvell,coherency-fabric",
.data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP }, .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP },
{.compatible = "marvell,armada-375-coherency-fabric", {.compatible = "marvell,armada-375-coherency-fabric",
......
...@@ -104,7 +104,7 @@ static void __iomem *pmsu_mp_base; ...@@ -104,7 +104,7 @@ static void __iomem *pmsu_mp_base;
static void *mvebu_cpu_resume; static void *mvebu_cpu_resume;
static struct of_device_id of_pmsu_table[] = { static const struct of_device_id of_pmsu_table[] = {
{ .compatible = "marvell,armada-370-pmsu", }, { .compatible = "marvell,armada-370-pmsu", },
{ .compatible = "marvell,armada-370-xp-pmsu", }, { .compatible = "marvell,armada-370-xp-pmsu", },
{ .compatible = "marvell,armada-380-pmsu", }, { .compatible = "marvell,armada-380-pmsu", },
......
...@@ -126,7 +126,7 @@ int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev) ...@@ -126,7 +126,7 @@ int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev)
return -ENODEV; return -ENODEV;
} }
#ifdef CONFIG_SMP #if defined(CONFIG_SMP) && defined(CONFIG_MACH_MVEBU_V7)
void mvebu_armada375_smp_wa_init(void) void mvebu_armada375_smp_wa_init(void)
{ {
u32 dev, rev; u32 dev, rev;
......
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
#include "mmio.h" #include "mmio.h"
#include "clcd.h" #include "clcd.h"
static const char *nspire_dt_match[] __initconst = { static const char *const nspire_dt_match[] __initconst = {
"ti,nspire", "ti,nspire",
"ti,nspire-cx", "ti,nspire-cx",
"ti,nspire-tp", "ti,nspire-tp",
......
...@@ -242,7 +242,7 @@ static int __init omap4_sar_ram_init(void) ...@@ -242,7 +242,7 @@ static int __init omap4_sar_ram_init(void)
} }
omap_early_initcall(omap4_sar_ram_init); omap_early_initcall(omap4_sar_ram_init);
static struct of_device_id gic_match[] = { static const struct of_device_id gic_match[] = {
{ .compatible = "arm,cortex-a9-gic", }, { .compatible = "arm,cortex-a9-gic", },
{ .compatible = "arm,cortex-a15-gic", }, { .compatible = "arm,cortex-a15-gic", },
{ }, { },
......
...@@ -674,7 +674,7 @@ int __init omap3xxx_prm_init(void) ...@@ -674,7 +674,7 @@ int __init omap3xxx_prm_init(void)
return prm_register(&omap3xxx_prm_ll_data); return prm_register(&omap3xxx_prm_ll_data);
} }
static struct of_device_id omap3_prm_dt_match_table[] = { static const struct of_device_id omap3_prm_dt_match_table[] = {
{ .compatible = "ti,omap3-prm" }, { .compatible = "ti,omap3-prm" },
{ } { }
}; };
......
...@@ -712,7 +712,7 @@ int __init omap44xx_prm_init(void) ...@@ -712,7 +712,7 @@ int __init omap44xx_prm_init(void)
return prm_register(&omap44xx_prm_ll_data); return prm_register(&omap44xx_prm_ll_data);
} }
static struct of_device_id omap_prm_dt_match_table[] = { static const struct of_device_id omap_prm_dt_match_table[] = {
{ .compatible = "ti,omap4-prm" }, { .compatible = "ti,omap4-prm" },
{ .compatible = "ti,omap5-prm" }, { .compatible = "ti,omap5-prm" },
{ .compatible = "ti,dra7-prm" }, { .compatible = "ti,dra7-prm" },
......
...@@ -27,7 +27,6 @@ config ARCH_ATLAS7 ...@@ -27,7 +27,6 @@ config ARCH_ATLAS7
select CPU_V7 select CPU_V7
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_SMP select HAVE_SMP
select SMP_ON_UP if SMP
help help
Support for CSR SiRFSoC ARM Cortex A7 Platform Support for CSR SiRFSoC ARM Cortex A7 Platform
......
...@@ -21,7 +21,7 @@ static void __init sirfsoc_init_late(void) ...@@ -21,7 +21,7 @@ static void __init sirfsoc_init_late(void)
} }
#ifdef CONFIG_ARCH_ATLAS6 #ifdef CONFIG_ARCH_ATLAS6
static const char *atlas6_dt_match[] __initconst = { static const char *const atlas6_dt_match[] __initconst = {
"sirf,atlas6", "sirf,atlas6",
NULL NULL
}; };
...@@ -36,7 +36,7 @@ MACHINE_END ...@@ -36,7 +36,7 @@ MACHINE_END
#endif #endif
#ifdef CONFIG_ARCH_PRIMA2 #ifdef CONFIG_ARCH_PRIMA2
static const char *prima2_dt_match[] __initconst = { static const char *const prima2_dt_match[] __initconst = {
"sirf,prima2", "sirf,prima2",
NULL NULL
}; };
...@@ -52,7 +52,7 @@ MACHINE_END ...@@ -52,7 +52,7 @@ MACHINE_END
#endif #endif
#ifdef CONFIG_ARCH_ATLAS7 #ifdef CONFIG_ARCH_ATLAS7
static const char *atlas7_dt_match[] __initdata = { static const char *const atlas7_dt_match[] __initconst = {
"sirf,atlas7", "sirf,atlas7",
NULL NULL
}; };
......
...@@ -40,7 +40,7 @@ static void sirfsoc_secondary_init(unsigned int cpu) ...@@ -40,7 +40,7 @@ static void sirfsoc_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock); spin_unlock(&boot_lock);
} }
static struct of_device_id clk_ids[] = { static const struct of_device_id clk_ids[] = {
{ .compatible = "sirf,atlas7-clkc" }, { .compatible = "sirf,atlas7-clkc" },
{}, {},
}; };
......
...@@ -11,6 +11,7 @@ config ARCH_ROCKCHIP ...@@ -11,6 +11,7 @@ config ARCH_ROCKCHIP
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
select DW_APB_TIMER_OF select DW_APB_TIMER_OF
select REGULATOR if PM
select ROCKCHIP_TIMER select ROCKCHIP_TIMER
select ARM_GLOBAL_TIMER select ARM_GLOBAL_TIMER
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
......
...@@ -24,7 +24,13 @@ extern unsigned long rkpm_bootdata_ddr_data; ...@@ -24,7 +24,13 @@ extern unsigned long rkpm_bootdata_ddr_data;
extern unsigned long rk3288_bootram_sz; extern unsigned long rk3288_bootram_sz;
void rockchip_slp_cpu_resume(void); void rockchip_slp_cpu_resume(void);
#ifdef CONFIG_PM_SLEEP
void __init rockchip_suspend_init(void); void __init rockchip_suspend_init(void);
#else
static inline void rockchip_suspend_init(void)
{
}
#endif
/****** following is rk3288 defined **********/ /****** following is rk3288 defined **********/
#define RK3288_PMU_WAKEUP_CFG0 0x00 #define RK3288_PMU_WAKEUP_CFG0 0x00
......
...@@ -63,7 +63,7 @@ static void __init s5pv210_dt_init_late(void) ...@@ -63,7 +63,7 @@ static void __init s5pv210_dt_init_late(void)
s5pv210_pm_init(); s5pv210_pm_init();
} }
static char const *s5pv210_dt_compat[] __initconst = { static char const *const s5pv210_dt_compat[] __initconst = {
"samsung,s5pc110", "samsung,s5pc110",
"samsung,s5pv210", "samsung,s5pv210",
NULL NULL
......
...@@ -37,7 +37,7 @@ static void __init emev2_map_io(void) ...@@ -37,7 +37,7 @@ static void __init emev2_map_io(void)
iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc)); iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
} }
static const char *emev2_boards_compat_dt[] __initconst = { static const char *const emev2_boards_compat_dt[] __initconst = {
"renesas,emev2", "renesas,emev2",
NULL, NULL,
}; };
......
...@@ -13,6 +13,7 @@ menuconfig ARCH_STI ...@@ -13,6 +13,7 @@ menuconfig ARCH_STI
select ARM_ERRATA_775420 select ARM_ERRATA_775420
select PL310_ERRATA_753970 if CACHE_L2X0 select PL310_ERRATA_753970 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0
select RESET_CONTROLLER
help help
Include support for STiH41x SOCs like STiH415/416 using the device tree Include support for STiH41x SOCs like STiH415/416 using the device tree
for discovery for discovery
......
...@@ -49,7 +49,7 @@ static struct generic_pm_domain *ux500_pm_domains[NR_DOMAINS] = { ...@@ -49,7 +49,7 @@ static struct generic_pm_domain *ux500_pm_domains[NR_DOMAINS] = {
[DOMAIN_VAPE] = &ux500_pm_domain_vape, [DOMAIN_VAPE] = &ux500_pm_domain_vape,
}; };
static struct of_device_id ux500_pm_domain_matches[] = { static const struct of_device_id ux500_pm_domain_matches[] __initconst = {
{ .compatible = "stericsson,ux500-pm-domains", }, { .compatible = "stericsson,ux500-pm-domains", },
{ }, { },
}; };
......
...@@ -35,7 +35,7 @@ static void __init versatile_dt_init(void) ...@@ -35,7 +35,7 @@ static void __init versatile_dt_init(void)
versatile_auxdata_lookup, NULL); versatile_auxdata_lookup, NULL);
} }
static const char *versatile_dt_match[] __initconst = { static const char *const versatile_dt_match[] __initconst = {
"arm,versatile-ab", "arm,versatile-ab",
"arm,versatile-pb", "arm,versatile-pb",
NULL, NULL,
......
...@@ -73,6 +73,7 @@ config ARCH_VEXPRESS_TC2_PM ...@@ -73,6 +73,7 @@ config ARCH_VEXPRESS_TC2_PM
depends on MCPM depends on MCPM
select ARM_CCI select ARM_CCI
select ARCH_VEXPRESS_SPC select ARCH_VEXPRESS_SPC
select ARM_CPU_SUSPEND
help help
Support for CPU and cluster power management on Versatile Express Support for CPU and cluster power management on Versatile Express
with a TC2 (A15x2 A7x3) big.LITTLE core tile. with a TC2 (A15x2 A7x3) big.LITTLE core tile.
......
...@@ -892,13 +892,6 @@ config CACHE_L2X0 ...@@ -892,13 +892,6 @@ config CACHE_L2X0
if CACHE_L2X0 if CACHE_L2X0
config CACHE_PL310
bool
default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
help
This option enables optimisations for the PL310 cache
controller.
config PL310_ERRATA_588369 config PL310_ERRATA_588369
bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
help help
......
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