Commit 21af872c authored by Jonathan Marek's avatar Jonathan Marek Committed by Rob Clark

drm/msm/adreno: add a2xx

derived from the a3xx driver and tested on the following hardware:
imx51-zii-rdu1 (a200 with 128kb gmem)
imx53-qsrb (a200)
msm8060-tenderloin (a220)
Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 86f46f25
...@@ -6,6 +6,7 @@ ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi ...@@ -6,6 +6,7 @@ ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
msm-y := \ msm-y := \
adreno/adreno_device.o \ adreno/adreno_device.o \
adreno/adreno_gpu.o \ adreno/adreno_gpu.o \
adreno/a2xx_gpu.o \
adreno/a3xx_gpu.o \ adreno/a3xx_gpu.o \
adreno/a4xx_gpu.o \ adreno/a4xx_gpu.o \
adreno/a5xx_gpu.o \ adreno/a5xx_gpu.o \
......
This diff is collapsed.
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2018 The Linux Foundation. All rights reserved. */
#ifndef __A2XX_GPU_H__
#define __A2XX_GPU_H__
#include "adreno_gpu.h"
/* arrg, somehow fb.h is getting pulled in: */
#undef ROP_COPY
#undef ROP_XOR
#include "a2xx.xml.h"
struct a2xx_gpu {
struct adreno_gpu base;
bool pm_enabled;
};
#define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)
#endif /* __A2XX_GPU_H__ */
...@@ -27,6 +27,39 @@ module_param_named(hang_debug, hang_debug, bool, 0600); ...@@ -27,6 +27,39 @@ module_param_named(hang_debug, hang_debug, bool, 0600);
static const struct adreno_info gpulist[] = { static const struct adreno_info gpulist[] = {
{ {
.rev = ADRENO_REV(2, 0, 0, 0),
.revn = 200,
.name = "A200",
.fw = {
[ADRENO_FW_PM4] = "yamato_pm4.fw",
[ADRENO_FW_PFP] = "yamato_pfp.fw",
},
.gmem = SZ_256K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a2xx_gpu_init,
}, { /* a200 on i.mx51 has only 128kib gmem */
.rev = ADRENO_REV(2, 0, 0, 1),
.revn = 201,
.name = "A200",
.fw = {
[ADRENO_FW_PM4] = "yamato_pm4.fw",
[ADRENO_FW_PFP] = "yamato_pfp.fw",
},
.gmem = SZ_128K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a2xx_gpu_init,
}, {
.rev = ADRENO_REV(2, 2, 0, ANY_ID),
.revn = 220,
.name = "A220",
.fw = {
[ADRENO_FW_PM4] = "leia_pm4_470.fw",
[ADRENO_FW_PFP] = "leia_pfp_470.fw",
},
.gmem = SZ_512K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a2xx_gpu_init,
}, {
.rev = ADRENO_REV(3, 0, 5, ANY_ID), .rev = ADRENO_REV(3, 0, 5, ANY_ID),
.revn = 305, .revn = 305,
.name = "A305", .name = "A305",
......
...@@ -311,16 +311,27 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, ...@@ -311,16 +311,27 @@ void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
*/ */
OUT_PKT3(ring, CP_EVENT_WRITE, 1); OUT_PKT3(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, HLSQ_FLUSH); OUT_RING(ring, HLSQ_FLUSH);
OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
OUT_RING(ring, 0x00000000);
} }
/* BIT(31) of CACHE_FLUSH_TS triggers CACHE_FLUSH_TS IRQ from GPU */ /* wait for idle before cache flush/interrupt */
OUT_PKT3(ring, CP_EVENT_WRITE, 3); OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
OUT_RING(ring, CACHE_FLUSH_TS | BIT(31)); OUT_RING(ring, 0x00000000);
OUT_RING(ring, rbmemptr(ring, fence));
OUT_RING(ring, submit->seqno); if (!adreno_is_a2xx(adreno_gpu)) {
/* BIT(31) of CACHE_FLUSH_TS triggers CACHE_FLUSH_TS IRQ from GPU */
OUT_PKT3(ring, CP_EVENT_WRITE, 3);
OUT_RING(ring, CACHE_FLUSH_TS | BIT(31));
OUT_RING(ring, rbmemptr(ring, fence));
OUT_RING(ring, submit->seqno);
} else {
/* BIT(31) means something else on a2xx */
OUT_PKT3(ring, CP_EVENT_WRITE, 3);
OUT_RING(ring, CACHE_FLUSH_TS);
OUT_RING(ring, rbmemptr(ring, fence));
OUT_RING(ring, submit->seqno);
OUT_PKT3(ring, CP_INTERRUPT, 1);
OUT_RING(ring, 0x80000000);
}
#if 0 #if 0
if (adreno_is_a3xx(adreno_gpu)) { if (adreno_is_a3xx(adreno_gpu)) {
......
...@@ -155,6 +155,20 @@ struct adreno_platform_config { ...@@ -155,6 +155,20 @@ struct adreno_platform_config {
__ret; \ __ret; \
}) })
static inline bool adreno_is_a2xx(struct adreno_gpu *gpu)
{
return (gpu->revn < 300);
}
static inline bool adreno_is_a20x(struct adreno_gpu *gpu)
{
return (gpu->revn < 210);
}
static inline bool adreno_is_a225(struct adreno_gpu *gpu)
{
return gpu->revn == 225;
}
static inline bool adreno_is_a3xx(struct adreno_gpu *gpu) static inline bool adreno_is_a3xx(struct adreno_gpu *gpu)
{ {
...@@ -335,6 +349,7 @@ static inline void adreno_gpu_write(struct adreno_gpu *gpu, ...@@ -335,6 +349,7 @@ static inline void adreno_gpu_write(struct adreno_gpu *gpu,
gpu_write(&gpu->base, reg - 1, data); gpu_write(&gpu->base, reg - 1, data);
} }
struct msm_gpu *a2xx_gpu_init(struct drm_device *dev);
struct msm_gpu *a3xx_gpu_init(struct drm_device *dev); struct msm_gpu *a3xx_gpu_init(struct drm_device *dev);
struct msm_gpu *a4xx_gpu_init(struct drm_device *dev); struct msm_gpu *a4xx_gpu_init(struct drm_device *dev);
struct msm_gpu *a5xx_gpu_init(struct drm_device *dev); struct msm_gpu *a5xx_gpu_init(struct drm_device *dev);
......
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