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Commit 21c27cab authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt 

Merge "ARM: STi: DT changes for v3.16, v3" from Maxime Coquelin:

Please consider these STi DT updates for v3.16.

This 3rd version takes into account Olof's comments on the v2:
        - Fix upper-cases in labels and node names
        - Sort compatibles order from specific to generic
        - Sort dts entries in Makefile

It also adds support for the B2020 revision E board for STiH416 SoC.

Note that two reset patches are part of this pull request, in order to avoid
compilation breakage.
Adding these two patches in this pull request has been accepted by Philipp Zabel.

* tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti: (23 commits)
  ARM: sti: stih41x: Provide a proper header for this DTSI file
  ARM: sti: stih416: Enable board LED support for B2020 RevE
  ARM: sti: stih416: Add support for B2020 RevE
  ARM: STi: DT: STiH41x Add clk_ignore_unused to bootargs
  ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9
  ARM: STi: DT: STiH415: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
  ARM: STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock
  ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen A9/DDR/GPU
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen B/C/D/E/F
  ARM: STi: DT: STiH416: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
  ARM: STi: DT: STiH416: Remove unused CLK_S_ICN_REG_0 fixed clock
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12
  ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
  ARM: STi: DT: add keyscan for stih41x-b2000
  ARM: STi: DT: add keyscan for stih416
  ARM: STi: DT: add keyscan for stih415
  driver: reset: sti: add keyscan for stih416
  driver: reset: sti: add keyscan for stih415
  ARM: dts: STiH407: Add B2120 board support
  ...
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents dee1c20c ca766449
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arch/arm/boot/dts/Makefile
View file @ 21c27cab
......@@ -336,10 +336,12 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
spear320-evb.dtb \
spear320-hmi.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \
stih416-b2000.dtb \
dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
stih415-b2000.dtb \
stih415-b2020.dtb \
stih416-b2020.dtb
stih416-b2000.dtb \
stih416-b2020.dtb \
stih416-b2020-revE.dtb
dtb-$(CONFIG_ARCH_SUNXI) += \
sun4i-a10-a1000.dtb \
sun4i-a10-cubieboard.dtb \
......
arch/arm/boot/dts/stih407-b2120.dts 0 → 100644
View file @ 21c27cab
/*
* Copyright (C) 2014 STMicroelectronics (R&D) Limited.
* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "stih407.dtsi"
/ {
model = "STiH407 B2120";
compatible = "st,stih407-b2120", "st,stih407";
chosen {
bootargs = "console=ttyAS0,115200";
linux,stdout-path = &sbc_serial0;
};
memory {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
aliases {
ttyAS0 = &sbc_serial0;
};
soc {
sbc_serial0: serial@9530000 {
status = "okay";
};
leds {
compatible = "gpio-leds";
red {
#gpio-cells = <2>;
label = "Front Panel LED";
gpios = <&pio4 1 0>;
linux,default-trigger = "heartbeat";
};
green {
#gpio-cells = <2>;
gpios = <&pio1 3 0>;
default-state = "off";
};
};
i2c@9842000 {
status = "okay";
};
i2c@9843000 {
status = "okay";
};
i2c@9844000 {
status = "okay";
};
i2c@9845000 {
status = "okay";
};
i2c@9540000 {
status = "okay";
};
/* SSC11 to HDMI */
i2c@9541000 {
status = "okay";
/* HDMI V1.3a supports Standard mode only */
clock-frequency = <100000>;
st,i2c-min-scl-pulse-width-us = <0>;
st,i2c-min-sda-pulse-width-us = <5>;
};
};
};
arch/arm/boot/dts/stih407-clock.dtsi 0 → 100644
View file @ 21c27cab
/*
* Copyright (C) 2014 STMicroelectronics R&D Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
clocks {
/*
* Fixed 30MHz oscillator inputs to SoC
*/
clk_sysin: clk-sysin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <30000000>;
};
/*
* ARM Peripheral clock for timers
*/
arm_periph_clk: arm-periph-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <600000000>;
};
/*
* Bootloader initialized system infrastructure clock for
* serial devices.
*/
clk_ext2f_a9: clockgen-c0@13 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
clock-output-names = "clk-s-icn-reg-0";
};
};
};
arch/arm/boot/dts/stih407-pinctrl.dtsi 0 → 100644
View file @ 21c27cab
This diff is collapsed.
arch/arm/boot/dts/stih407.dtsi 0 → 100644
View file @ 21c27cab
/*
* Copyright (C) 2014 STMicroelectronics Limited.
* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
#include "stih407-clock.dtsi"
#include "stih407-pinctrl.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
};
};
intc: interrupt-controller@08761000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x08761000 0x1000>, <0x08760100 0x100>;
};
scu@08760000 {
compatible = "arm,cortex-a9-scu";
reg = <0x08760000 0x1000>;
};
timer@08760200 {
interrupt-parent = <&intc>;
compatible = "arm,cortex-a9-global-timer";
reg = <0x08760200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&arm_periph_clk>;
};
l2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0x08762000 0x1000>;
arm,data-latency = <3 3 3>;
arm,tag-latency = <2 2 2>;
cache-unified;
cache-level = <2>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
ranges;
compatible = "simple-bus";
syscfg_sbc: sbc-syscfg@9620000 {
compatible = "st,stih407-sbc-syscfg", "syscon";
reg = <0x9620000 0x1000>;
};
syscfg_front: front-syscfg@9280000 {
compatible = "st,stih407-front-syscfg", "syscon";
reg = <0x9280000 0x1000>;
};
syscfg_rear: rear-syscfg@9290000 {
compatible = "st,stih407-rear-syscfg", "syscon";
reg = <0x9290000 0x1000>;
};
syscfg_flash: flash-syscfg@92a0000 {
compatible = "st,stih407-flash-syscfg", "syscon";
reg = <0x92a0000 0x1000>;
};
syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
compatible = "st,stih407-sbc-reg-syscfg", "syscon";
reg = <0x9600000 0x1000>;
};
syscfg_core: core-syscfg@92b0000 {
compatible = "st,stih407-core-syscfg", "syscon";
reg = <0x92b0000 0x1000>;
};
syscfg_lpm: lpm-syscfg@94b5100 {
compatible = "st,stih407-lpm-syscfg", "syscon";
reg = <0x94b5100 0x1000>;
};
serial@9830000 {
compatible = "st,asc";
reg = <0x9830000 0x2c>;
interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial0>;
clocks = <&clk_ext2f_a9>;
status = "disabled";
};
serial@9831000 {
compatible = "st,asc";
reg = <0x9831000 0x2c>;
interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial1>;
clocks = <&clk_ext2f_a9>;
status = "disabled";
};
serial@9832000 {
compatible = "st,asc";
reg = <0x9832000 0x2c>;
interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>;
clocks = <&clk_ext2f_a9>;
status = "disabled";
};
/* SBC_ASC0 - UART10 */
sbc_serial0: serial@9530000 {
compatible = "st,asc";
reg = <0x9530000 0x2c>;
interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial0>;
clocks = <&clk_sysin>;
status = "disabled";
};
serial@9531000 {
compatible = "st,asc";
reg = <0x9531000 0x2c>;
interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
clocks = <&clk_sysin>;
status = "disabled";
};
i2c@9840000 {
compatible = "st,comms-ssc4-i2c";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x9840000 0x110>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0_default>;
status = "disabled";
};
i2c@9841000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9841000 0x110>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
i2c@9842000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9842000 0x110>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_default>;
status = "disabled";
};
i2c@9843000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9843000 0x110>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
status = "disabled";
};
i2c@9844000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9844000 0x110>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
status = "disabled";
};
i2c@9845000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9845000 0x110>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_ext2f_a9>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
status = "disabled";
};
/* SSCs on SBC */
i2c@9540000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9540000 0x110>;
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c10_default>;
status = "disabled";
};
i2c@9541000 {
compatible = "st,comms-ssc4-i2c";
reg = <0x9541000 0x110>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c11_default>;
status = "disabled";
};
};
};
arch/arm/boot/dts/stih415-b2000.dts
View file @ 21c27cab
......@@ -11,5 +11,5 @@
#include "stih41x-b2000.dtsi"
/ {
model = "STiH415 B2000 Board";
compatible = "st,stih415", "st,stih415-b2000";
compatible = "st,stih415-b2000", "st,stih415";
};
arch/arm/boot/dts/stih415-b2020.dts
View file @ 21c27cab
......@@ -11,5 +11,5 @@
#include "stih41x-b2020.dtsi"
/ {
model = "STiH415 B2020 Board";
compatible = "st,stih415", "st,stih415-b2020";
compatible = "st,stih415-b2020", "st,stih415";
};
arch/arm/boot/dts/stih415-clock.dtsi
View file @ 21c27cab
This diff is collapsed.
arch/arm/boot/dts/stih415-pinctrl.dtsi
View file @ 21c27cab
......@@ -102,6 +102,22 @@ st,pins {
};
};
keyscan {
pinctrl_keyscan: keyscan {
st,pins {
keyin0 = <&PIO0 2 ALT2 IN>;
keyin1 = <&PIO0 3 ALT2 IN>;
keyin2 = <&PIO0 4 ALT2 IN>;
keyin3 = <&PIO2 6 ALT2 IN>;
keyout0 = <&PIO1 6 ALT2 OUT>;
keyout1 = <&PIO1 7 ALT2 OUT>;
keyout2 = <&PIO0 6 ALT2 OUT>;
keyout3 = <&PIO2 7 ALT2 OUT>;
};
};
};
sbc_i2c0 {
pinctrl_sbc_i2c0_default: sbc_i2c0-default {
st,pins {
......
arch/arm/boot/dts/stih415.dtsi
View file @ 21c27cab
......@@ -82,7 +82,7 @@ serial2: serial@fed32000 {
interrupts = <0 197 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>;
clocks = <&CLKS_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
};
/* SBC comms block ASCs in SASG1 */
......@@ -91,7 +91,7 @@ sbc_serial1: serial@fe531000 {
status = "disabled";
reg = <0xfe531000 0x2c>;
interrupts = <0 210 0>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
};
......@@ -100,7 +100,7 @@ i2c@fed40000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLKS_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -113,7 +113,7 @@ i2c@fed41000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed41000 0x110>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLKS_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -126,7 +126,7 @@ i2c@fe540000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe540000 0x110>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -139,7 +139,7 @@ i2c@fe541000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe541000 0x110>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -170,7 +170,7 @@ ethernet0: dwmac@fe810000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth";
clocks = <&CLKS_GMAC0_PHY>;
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
};
ethernet1: dwmac@fef08000 {
......@@ -193,18 +193,30 @@ ethernet1: dwmac@fef08000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth";
clocks = <&CLKS_ETH1_PHY>;
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
};
rc: rc@fe518000 {
compatible = "st,comms-irb";
reg = <0xfe518000 0x234>;
interrupts = <0 203 0>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
rx-mode = "infrared";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir>;
resets = <&softreset STIH415_IRB_SOFTRESET>;
};
keyscan: keyscan@fe4b0000 {
compatible = "st,sti-keyscan";
status = "disabled";
reg = <0xfe4b0000 0x2000>;
interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_keyscan>;
resets = <&powerdown STIH415_KEYSCAN_POWERDOWN>,
<&softreset STIH415_KEYSCAN_SOFTRESET>;
};
};
};
arch/arm/boot/dts/stih416-b2000.dts
View file @ 21c27cab
......@@ -9,8 +9,7 @@
/dts-v1/;
#include "stih416.dtsi"
#include "stih41x-b2000.dtsi"
/ {
compatible = "st,stih416", "st,stih416-b2000";
model = "STiH416 B2000";
compatible = "st,stih416-b2000", "st,stih416";
};
arch/arm/boot/dts/stih416-b2020-revE.dts 0 → 100644
View file @ 21c27cab
/*
* Copyright (C) 2014 STMicroelectronics (R&D) Limited.
* Author: Lee Jones <lee.jones@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
/dts-v1/;
#include "stih416.dtsi"
#include "stih41x-b2020.dtsi"
/ {
model = "STiH416 B2020 REV-E";
compatible = "st,stih416-b2020", "st,stih416";
soc {
leds {
compatible = "gpio-leds";
red {
#gpio-cells = <1>;
label = "Front Panel LED";
gpios = <&PIO4 1>;
linux,default-trigger = "heartbeat";
};
green {
gpios = <&PIO1 3>;
default-state = "off";
};
};
ethernet1: dwmac@fef08000 {
snps,reset-gpio = <&PIO0 7>;
};
};
};
arch/arm/boot/dts/stih416-b2020.dts
View file @ 21c27cab
......@@ -11,6 +11,5 @@
#include "stih41x-b2020.dtsi"
/ {
model = "STiH416 B2020";
compatible = "st,stih416", "st,stih416-b2020";
compatible = "st,stih416-b2020", "st,stih416";
};
arch/arm/boot/dts/stih416-clock.dtsi
View file @ 21c27cab
This diff is collapsed.
arch/arm/boot/dts/stih416-pinctrl.dtsi
View file @ 21c27cab
......@@ -122,6 +122,22 @@ st,pins {
};
};
keyscan {
pinctrl_keyscan: keyscan {
st,pins {
keyin0 = <&PIO0 2 ALT2 IN>;
keyin1 = <&PIO0 3 ALT2 IN>;
keyin2 = <&PIO0 4 ALT2 IN>;
keyin3 = <&PIO2 6 ALT2 IN>;
keyout0 = <&PIO1 6 ALT2 OUT>;
keyout1 = <&PIO1 7 ALT2 OUT>;
keyout2 = <&PIO0 6 ALT2 OUT>;
keyout3 = <&PIO2 7 ALT2 OUT>;
};
};
};
sbc_i2c0 {
pinctrl_sbc_i2c0_default: sbc_i2c0-default {
st,pins {
......
arch/arm/boot/dts/stih416.dtsi
View file @ 21c27cab
......@@ -89,7 +89,7 @@ serial2: serial@fed32000{
status = "disabled";
reg = <0xfed32000 0x2c>;
interrupts = <0 197 0>;
clocks = <&CLK_S_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
};
......@@ -102,14 +102,14 @@ sbc_serial1: serial@fe531000 {
interrupts = <0 210 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
};
i2c@fed40000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_S_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -122,7 +122,7 @@ i2c@fed41000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed41000 0x110>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_S_ICN_REG_0>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -135,7 +135,7 @@ i2c@fe540000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe540000 0x110>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -148,7 +148,7 @@ i2c@fe541000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfe541000 0x110>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
clock-names = "ssc";
clock-frequency = <400000>;
pinctrl-names = "default";
......@@ -176,7 +176,7 @@ ethernet0: dwmac@fe810000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii0>;
clock-names = "stmmaceth";
clocks = <&CLK_S_GMAC0_PHY>;
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
};
ethernet1: dwmac@fef08000 {
......@@ -198,7 +198,7 @@ ethernet1: dwmac@fef08000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mii1>;
clock-names = "stmmaceth";
clocks = <&CLK_S_ETH1_PHY>;
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
};
rc: rc@fe518000 {
......@@ -206,7 +206,7 @@ rc: rc@fe518000 {
reg = <0xfe518000 0x234>;
interrupts = <0 203 0>;
rx-mode = "infrared";
clocks = <&CLK_SYSIN>;
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir>;
resets = <&softreset STIH416_IRB_SOFTRESET>;
......@@ -224,5 +224,17 @@ spifsm: spifsm@fe902000 {
status = "disabled";
};
keyscan: keyscan@fe4b0000 {
compatible = "st,sti-keyscan";
status = "disabled";
reg = <0xfe4b0000 0x2000>;
interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
clocks = <&clk_sysin>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_keyscan>;
resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
<&softreset STIH416_KEYSCAN_SOFTRESET>;
};
};
};
arch/arm/boot/dts/stih41x-b2000.dtsi
View file @ 21c27cab
......@@ -6,6 +6,7 @@
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
#include <dt-bindings/input/input.h>
/ {
memory{
......@@ -14,7 +15,7 @@ memory{
};
chosen {
bootargs = "console=ttyAS0,115200";
bootargs = "console=ttyAS0,115200 clk_ignore_unused";
linux,stdout-path = &serial2;
};
......@@ -68,5 +69,27 @@ ethernet1: dwmac@fef08000 {
snps,reset-active-low;
snps,reset-delays-us = <0 10000 10000>;
};
keyscan: keyscan@fe4b0000 {
keypad,num-rows = <4>;
keypad,num-columns = <4>;
st,debounce-us = <5000>;
linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_F13)
MATRIX_KEY(0x00, 0x01, KEY_F9)
MATRIX_KEY(0x00, 0x02, KEY_F5)
MATRIX_KEY(0x00, 0x03, KEY_F1)
MATRIX_KEY(0x01, 0x00, KEY_F14)
MATRIX_KEY(0x01, 0x01, KEY_F10)
MATRIX_KEY(0x01, 0x02, KEY_F6)
MATRIX_KEY(0x01, 0x03, KEY_F2)
MATRIX_KEY(0x02, 0x00, KEY_F15)
MATRIX_KEY(0x02, 0x01, KEY_F11)
MATRIX_KEY(0x02, 0x02, KEY_F7)
MATRIX_KEY(0x02, 0x03, KEY_F3)
MATRIX_KEY(0x03, 0x00, KEY_F16)
MATRIX_KEY(0x03, 0x01, KEY_F12)
MATRIX_KEY(0x03, 0x02, KEY_F8)
MATRIX_KEY(0x03, 0x03, KEY_F4) >;
};
};
};
arch/arm/boot/dts/stih41x-b2020.dtsi
View file @ 21c27cab
......@@ -14,7 +14,7 @@ memory{
};
chosen {
bootargs = "console=ttyAS0,115200";
bootargs = "console=ttyAS0,115200 clk_ignore_unused";
linux,stdout-path = &sbc_serial1;
};
......
arch/arm/boot/dts/stih41x.dtsi
View file @ 21c27cab
/*
* Copyright (C) 2014 STMicroelectronics Limited.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
......
drivers/reset/sti/reset-stih415.c
View file @ 21c27cab
......@@ -73,6 +73,7 @@ static const struct syscfg_reset_channel_data stih415_softresets[] = {
[STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9),
[STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10),
[STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11),
[STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8),
};
static struct syscfg_reset_controller_data stih415_powerdown_controller = {
......
drivers/reset/sti/reset-stih416.c
View file @ 21c27cab
......@@ -104,6 +104,7 @@ static const struct syscfg_reset_channel_data stih416_softresets[] = {
[STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4),
[STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10),
[STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16),
[STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8),
};
static struct syscfg_reset_controller_data stih416_powerdown_controller = {
......
include/dt-bindings/clock/stih415-clks.h 0 → 100644
View file @ 21c27cab
/*
* This header provides constants clk index STMicroelectronics
* STiH415 SoC.
*/
#ifndef _CLK_STIH415
#define _CLK_STIH415
/* CLOCKGEN A0 */
#define CLK_ICN_REG 0
#define CLK_ETH1_PHY 4
/* CLOCKGEN A1 */
#define CLK_GMAC0_PHY 3
#endif
include/dt-bindings/clock/stih416-clks.h 0 → 100644
View file @ 21c27cab
/*
* This header provides constants clk index STMicroelectronics
* STiH416 SoC.
*/
#ifndef _CLK_STIH416
#define _CLK_STIH416
/* CLOCKGEN A0 */
#define CLK_ICN_REG 0
#define CLK_ETH1_PHY 4
/* CLOCKGEN A1 */
#define CLK_GMAC0_PHY 3
#endif
include/dt-bindings/reset-controller/stih415-resets.h
View file @ 21c27cab
......@@ -22,5 +22,6 @@
#define STIH415_USB0_SOFTRESET 3
#define STIH415_USB1_SOFTRESET 4
#define STIH415_USB2_SOFTRESET 5
#define STIH415_KEYSCAN_SOFTRESET 6
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */
include/dt-bindings/reset-controller/stih416-resets.h
View file @ 21c27cab
......@@ -46,5 +46,6 @@
#define STIH416_COMPO_A_SOFTRESET 25
#define STIH416_VP8_DEC_SOFTRESET 26
#define STIH416_VTG_MAIN_SOFTRESET 27
#define STIH416_KEYSCAN_SOFTRESET 28
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
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