Commit 222cb1bf authored by Linus Walleij's avatar Linus Walleij Committed by Mike Turquette

clk: impd1: add pclk clocks

The IM-PD1 PrimeCells all have pclk assignments though this clock
cannot be controlled, and we need to provide this as a dummy
clock for the PL061 GPIO driver to probe, so let's assign it to
all the cells on the board.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 665bb114
......@@ -20,6 +20,8 @@
#define IMPD1_LOCK 0x08
struct impd1_clk {
char *pclkname;
struct clk *pclk;
char *vco1name;
struct clk *vco1clk;
char *vco2name;
......@@ -31,7 +33,7 @@ struct impd1_clk {
struct clk *spiclk;
char *scname;
struct clk *scclk;
struct clk_lookup *clks[6];
struct clk_lookup *clks[15];
};
/* One entry for each connected IM-PD1 LM */
......@@ -86,6 +88,7 @@ void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
{
struct impd1_clk *imc;
struct clk *clk;
struct clk *pclk;
int i;
if (id > 3) {
......@@ -94,11 +97,18 @@ void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
}
imc = &impd1_clks[id];
/* Register the fixed rate PCLK */
imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL,
CLK_IS_ROOT, 0);
imc->pclk = pclk;
imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);
clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL,
base);
imc->vco1clk = clk;
imc->clks[0] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
imc->clks[0] = clkdev_alloc(pclk, "apb_pclk", "lm%x:01000", id);
imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
/* VCO2 is also called "CLK2" */
imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id);
......@@ -107,28 +117,38 @@ void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
imc->vco2clk = clk;
/* MMCI uses CLK2 right off */
imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
imc->clks[2] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00700", id);
imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
/* UART reference clock divides CLK2 by a fixed factor 4 */
imc->uartname = kasprintf(GFP_KERNEL, "lm%x-uartclk", id);
clk = clk_register_fixed_factor(NULL, imc->uartname, imc->vco2name,
CLK_IGNORE_UNUSED, 1, 4);
imc->uartclk = clk;
imc->clks[2] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
imc->clks[4] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00100", id);
imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
imc->clks[6] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00200", id);
imc->clks[7] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
/* SPI PL022 clock divides CLK2 by a fixed factor 64 */
imc->spiname = kasprintf(GFP_KERNEL, "lm%x-spiclk", id);
clk = clk_register_fixed_factor(NULL, imc->spiname, imc->vco2name,
CLK_IGNORE_UNUSED, 1, 64);
imc->clks[4] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
imc->clks[8] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00300", id);
imc->clks[9] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
/* The GPIO blocks and AACI have only PCLK */
imc->clks[10] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00400", id);
imc->clks[11] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00500", id);
imc->clks[12] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00800", id);
/* Smart Card clock divides CLK2 by a fixed factor 4 */
imc->scname = kasprintf(GFP_KERNEL, "lm%x-scclk", id);
clk = clk_register_fixed_factor(NULL, imc->scname, imc->vco2name,
CLK_IGNORE_UNUSED, 1, 4);
imc->scclk = clk;
imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
imc->clks[13] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00600", id);
imc->clks[14] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
clkdev_add(imc->clks[i]);
......@@ -150,10 +170,12 @@ void integrator_impd1_clk_exit(unsigned int id)
clk_unregister(imc->uartclk);
clk_unregister(imc->vco2clk);
clk_unregister(imc->vco1clk);
clk_unregister(imc->pclk);
kfree(imc->scname);
kfree(imc->spiname);
kfree(imc->uartname);
kfree(imc->vco2name);
kfree(imc->vco1name);
kfree(imc->pclkname);
}
EXPORT_SYMBOL_GPL(integrator_impd1_clk_exit);
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