Commit 24468374 authored by Nathan Sullivan's avatar Nathan Sullivan Committed by David S. Miller

net: macb: clear interrupts when disabling them

Disabling interrupts with the IDR register does not stop the macb hardware
from asserting its interrupt line if there are interrupts pending.  Always
clear the interrupts using ISR, and be sure to write it on hardware that
is not read-to-clear, like Zynq.  Not doing so will cause interrupts when
the driver doesn't expect them.
Signed-off-by: default avatarNathan Sullivan <nathan.sullivan@ni.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 65a5124a
...@@ -1040,6 +1040,8 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) ...@@ -1040,6 +1040,8 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
/* close possible race with dev_close */ /* close possible race with dev_close */
if (unlikely(!netif_running(dev))) { if (unlikely(!netif_running(dev))) {
queue_writel(queue, IDR, -1); queue_writel(queue, IDR, -1);
if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
queue_writel(queue, ISR, -1);
break; break;
} }
...@@ -1561,6 +1563,8 @@ static void macb_reset_hw(struct macb *bp) ...@@ -1561,6 +1563,8 @@ static void macb_reset_hw(struct macb *bp)
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
queue_writel(queue, IDR, -1); queue_writel(queue, IDR, -1);
queue_readl(queue, ISR); queue_readl(queue, ISR);
if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
queue_writel(queue, ISR, -1);
} }
} }
......
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