Commit 26b82873 authored by Deepak Rawat's avatar Deepak Rawat Committed by Roland Scheidegger

drm/vmwgfx: Split surface metadata from struct vmw_surface

Create a new structure vmw_surface_metadata representing the metadata
used for creating surface. With this can make the surface_define_priv
a bit cleaner.
Signed-off-by: default avatarDeepak Rawat <drawat.floss@gmail.com>
Reviewed-by: default avatarBrian Paul <brianp@vmware.com>
Reviewed-by: default avatarThomas Hellström (VMware) <thomas_os@shipmail.org>
Reviewed-by: default avatarRoland Scheidegger <sroland@vmware.com>
Signed-off-by: default avatarRoland Scheidegger <sroland@vmware.com>
parent e8bead9c
...@@ -225,24 +225,56 @@ struct vmw_cursor_snooper { ...@@ -225,24 +225,56 @@ struct vmw_cursor_snooper {
struct vmw_framebuffer; struct vmw_framebuffer;
struct vmw_surface_offset; struct vmw_surface_offset;
struct vmw_surface { /**
struct vmw_resource res; * struct vmw_surface_metadata - Metadata describing a surface.
SVGA3dSurfaceAllFlags flags; *
uint32_t format; * @flags: Device flags.
uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; * @format: Surface SVGA3D_x format.
* @mip_levels: Mip level for each face. For GB first index is used only.
* @multisample_count: Sample count.
* @multisample_pattern: Sample patterns.
* @quality_level: Quality level.
* @autogen_filter: Filter for automatically generated mipmaps.
* @array_size: Number of array elements for a 1D/2D texture. For cubemap
texture number of faces * array_size. This should be 0 for pre
SM4 device.
* @num_sizes: Size of @sizes. For GB surface this should always be 1.
* @base_size: Surface dimension.
* @sizes: Array representing mip sizes. Legacy only.
* @scanout: Whether this surface will be used for scanout.
*
* This tracks metadata for both legacy and guest backed surface.
*/
struct vmw_surface_metadata {
u64 flags;
u32 format;
u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES];
u32 multisample_count;
u32 multisample_pattern;
u32 quality_level;
u32 autogen_filter;
u32 array_size;
u32 num_sizes;
struct drm_vmw_size base_size; struct drm_vmw_size base_size;
struct drm_vmw_size *sizes; struct drm_vmw_size *sizes;
uint32_t num_sizes;
bool scanout; bool scanout;
uint32_t array_size; };
/* TODO so far just a extra pointer */
/**
* struct vmw_surface: Resource structure for a surface.
*
* @res: The base resource for this surface.
* @metadata: Metadata for this surface resource.
* @snooper: Cursor data. Legacy surface only.
* @offsets: Legacy surface only.
* @view_list: List of views bound to this surface.
*/
struct vmw_surface {
struct vmw_resource res;
struct vmw_surface_metadata metadata;
struct vmw_cursor_snooper snooper; struct vmw_cursor_snooper snooper;
struct vmw_surface_offset *offsets; struct vmw_surface_offset *offsets;
SVGA3dTextureFilter autogen_filter;
uint32_t multisample_count;
struct list_head view_list; struct list_head view_list;
SVGA3dMSPattern multisample_pattern;
SVGA3dMSQualityLevel quality_level;
}; };
struct vmw_marker_queue { struct vmw_marker_queue {
......
...@@ -905,14 +905,14 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, ...@@ -905,14 +905,14 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
*/ */
/* Surface must be marked as a scanout. */ /* Surface must be marked as a scanout. */
if (unlikely(!surface->scanout)) if (unlikely(!surface->metadata.scanout))
return -EINVAL; return -EINVAL;
if (unlikely(surface->mip_levels[0] != 1 || if (unlikely(surface->metadata.mip_levels[0] != 1 ||
surface->num_sizes != 1 || surface->metadata.num_sizes != 1 ||
surface->base_size.width < mode_cmd->width || surface->metadata.base_size.width < mode_cmd->width ||
surface->base_size.height < mode_cmd->height || surface->metadata.base_size.height < mode_cmd->height ||
surface->base_size.depth != 1)) { surface->metadata.base_size.depth != 1)) {
DRM_ERROR("Incompatible surface dimensions " DRM_ERROR("Incompatible surface dimensions "
"for requested mode.\n"); "for requested mode.\n");
return -EINVAL; return -EINVAL;
...@@ -941,7 +941,7 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, ...@@ -941,7 +941,7 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
* For DX, surface format validation is done when surface->scanout * For DX, surface format validation is done when surface->scanout
* is set. * is set.
*/ */
if (!has_sm4_context(dev_priv) && format != surface->format) { if (!has_sm4_context(dev_priv) && format != surface->metadata.format) {
DRM_ERROR("Invalid surface format for requested mode.\n"); DRM_ERROR("Invalid surface format for requested mode.\n");
return -EINVAL; return -EINVAL;
} }
...@@ -2516,7 +2516,7 @@ int vmw_kms_update_proxy(struct vmw_resource *res, ...@@ -2516,7 +2516,7 @@ int vmw_kms_update_proxy(struct vmw_resource *res,
int increment) int increment)
{ {
struct vmw_private *dev_priv = res->dev_priv; struct vmw_private *dev_priv = res->dev_priv;
struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size; struct drm_vmw_size *size = &vmw_res_to_srf(res)->metadata.base_size;
struct { struct {
SVGA3dCmdHeader header; SVGA3dCmdHeader header;
SVGA3dCmdUpdateGBImage body; SVGA3dCmdUpdateGBImage body;
......
...@@ -590,7 +590,7 @@ static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty) ...@@ -590,7 +590,7 @@ static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
return; return;
/* Assume we are blitting from Guest (bo) to Host (display_srf) */ /* Assume we are blitting from Guest (bo) to Host (display_srf) */
dst_pitch = stdu->display_srf->base_size.width * stdu->cpp; dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
dst_bo = &stdu->display_srf->res.backup->base; dst_bo = &stdu->display_srf->res.backup->base;
dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp; dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
...@@ -1058,8 +1058,9 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, ...@@ -1058,8 +1058,9 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
vfb = vmw_framebuffer_to_vfb(new_fb); vfb = vmw_framebuffer_to_vfb(new_fb);
new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb); new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay && if (new_vfbs &&
new_vfbs->surface->base_size.height == vdisplay) new_vfbs->surface->metadata.base_size.width == hdisplay &&
new_vfbs->surface->metadata.base_size.height == vdisplay)
new_content_type = SAME_AS_DISPLAY; new_content_type = SAME_AS_DISPLAY;
else if (vfb->bo) else if (vfb->bo)
new_content_type = SEPARATE_BO; new_content_type = SEPARATE_BO;
...@@ -1082,15 +1083,15 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, ...@@ -1082,15 +1083,15 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
switch (new_fb->format->cpp[0]*8) { switch (new_fb->format->cpp[0]*8) {
case 32: case 32:
content_srf.format = SVGA3D_X8R8G8B8; content_srf.metadata.format = SVGA3D_X8R8G8B8;
break; break;
case 16: case 16:
content_srf.format = SVGA3D_R5G6B5; content_srf.metadata.format = SVGA3D_R5G6B5;
break; break;
case 8: case 8:
content_srf.format = SVGA3D_P8; content_srf.metadata.format = SVGA3D_P8;
break; break;
default: default:
...@@ -1098,22 +1099,25 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, ...@@ -1098,22 +1099,25 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
return -EINVAL; return -EINVAL;
} }
content_srf.flags = 0; content_srf.metadata.flags = 0;
content_srf.mip_levels[0] = 1; content_srf.metadata.mip_levels[0] = 1;
content_srf.multisample_count = 0; content_srf.metadata.multisample_count = 0;
content_srf.multisample_pattern = content_srf.metadata.multisample_pattern =
SVGA3D_MS_PATTERN_NONE; SVGA3D_MS_PATTERN_NONE;
content_srf.quality_level = SVGA3D_MS_QUALITY_NONE; content_srf.metadata.quality_level =
SVGA3D_MS_QUALITY_NONE;
} else { } else {
content_srf = *new_vfbs->surface; content_srf = *new_vfbs->surface;
} }
if (vps->surf) { if (vps->surf) {
struct drm_vmw_size cur_base_size = vps->surf->base_size; struct drm_vmw_size cur_base_size =
vps->surf->metadata.base_size;
if (cur_base_size.width != display_base_size.width || if (cur_base_size.width != display_base_size.width ||
cur_base_size.height != display_base_size.height || cur_base_size.height != display_base_size.height ||
vps->surf->format != content_srf.format) { vps->surf->metadata.format !=
content_srf.metadata.format) {
WARN_ON(vps->pinned != 0); WARN_ON(vps->pinned != 0);
vmw_surface_unreference(&vps->surf); vmw_surface_unreference(&vps->surf);
} }
...@@ -1125,15 +1129,15 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, ...@@ -1125,15 +1129,15 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
(crtc->dev, (crtc->dev,
/* Kernel visible only */ /* Kernel visible only */
0, 0,
content_srf.flags, content_srf.metadata.flags,
content_srf.format, content_srf.metadata.format,
true, /* a scanout buffer */ true, /* a scanout buffer */
content_srf.mip_levels[0], content_srf.metadata.mip_levels[0],
content_srf.multisample_count, content_srf.metadata.multisample_count,
0, 0,
display_base_size, display_base_size,
content_srf.multisample_pattern, content_srf.metadata.multisample_pattern,
content_srf.quality_level, content_srf.metadata.quality_level,
&vps->surf); &vps->surf);
if (ret != 0) { if (ret != 0) {
DRM_ERROR("Couldn't allocate STDU surface.\n"); DRM_ERROR("Couldn't allocate STDU surface.\n");
...@@ -1311,7 +1315,7 @@ vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd, ...@@ -1311,7 +1315,7 @@ vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd,
diff.cpp = stdu->cpp; diff.cpp = stdu->cpp;
dst_bo = &stdu->display_srf->res.backup->base; dst_bo = &stdu->display_srf->res.backup->base;
dst_pitch = stdu->display_srf->base_size.width * stdu->cpp; dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp; dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
src_bo = &vfbbo->buffer->base; src_bo = &vfbbo->buffer->base;
......
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