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nexedi
linux
Commits
27abc13e
Commit
27abc13e
authored
Nov 22, 2012
by
Ben Skeggs
Browse files
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Plain Diff
drm/nv98/crypt: use nouveau_falcon base class
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
e3aaa946
Changes
3
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Showing
3 changed files
with
35 additions
and
95 deletions
+35
-95
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
+14
-13
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
+21
-43
drivers/gpu/drm/nouveau/core/include/engine/crypt.h
drivers/gpu/drm/nouveau/core/include/engine/crypt.h
+0
-39
No files found.
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
View file @
27abc13e
...
...
@@ -34,11 +34,11 @@
#include <engine/crypt.h>
struct
nv84_crypt_priv
{
struct
nouveau_
crypt
base
;
struct
nouveau_
engine
base
;
};
struct
nv84_crypt_chan
{
struct
nouveau_
crypt_chan
base
;
struct
nouveau_
engctx
base
;
};
/*******************************************************************************
...
...
@@ -96,8 +96,8 @@ nv84_crypt_context_ctor(struct nouveau_object *parent,
struct
nv84_crypt_chan
*
priv
;
int
ret
;
ret
=
nouveau_
crypt_context
_create
(
parent
,
engine
,
oclass
,
NULL
,
256
,
0
,
NVOBJ_FLAG_ZERO_ALLOC
,
&
priv
);
ret
=
nouveau_
engctx
_create
(
parent
,
engine
,
oclass
,
NULL
,
256
,
0
,
NVOBJ_FLAG_ZERO_ALLOC
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
...
...
@@ -110,11 +110,11 @@ nv84_crypt_cclass = {
.
handle
=
NV_ENGCTX
(
CRYPT
,
0x84
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv84_crypt_context_ctor
,
.
dtor
=
_nouveau_
crypt_context
_dtor
,
.
init
=
_nouveau_
crypt_context
_init
,
.
fini
=
_nouveau_
crypt_context
_fini
,
.
rd32
=
_nouveau_
crypt_context
_rd32
,
.
wr32
=
_nouveau_
crypt_context
_wr32
,
.
dtor
=
_nouveau_
engctx
_dtor
,
.
init
=
_nouveau_
engctx
_init
,
.
fini
=
_nouveau_
engctx
_fini
,
.
rd32
=
_nouveau_
engctx
_rd32
,
.
wr32
=
_nouveau_
engctx
_wr32
,
},
};
...
...
@@ -176,7 +176,8 @@ nv84_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct
nv84_crypt_priv
*
priv
;
int
ret
;
ret
=
nouveau_crypt_create
(
parent
,
engine
,
oclass
,
&
priv
);
ret
=
nouveau_engine_create
(
parent
,
engine
,
oclass
,
true
,
"PCRYPT"
,
"crypt"
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
...
...
@@ -195,7 +196,7 @@ nv84_crypt_init(struct nouveau_object *object)
struct
nv84_crypt_priv
*
priv
=
(
void
*
)
object
;
int
ret
;
ret
=
nouveau_
crypt
_init
(
&
priv
->
base
);
ret
=
nouveau_
engine
_init
(
&
priv
->
base
);
if
(
ret
)
return
ret
;
...
...
@@ -210,8 +211,8 @@ nv84_crypt_oclass = {
.
handle
=
NV_ENGINE
(
CRYPT
,
0x84
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv84_crypt_ctor
,
.
dtor
=
_nouveau_
crypt
_dtor
,
.
dtor
=
_nouveau_
engine
_dtor
,
.
init
=
nv84_crypt_init
,
.
fini
=
_nouveau_
crypt
_fini
,
.
fini
=
_nouveau_
engine
_fini
,
},
};
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
View file @
27abc13e
...
...
@@ -26,6 +26,7 @@
#include <core/enum.h>
#include <core/class.h>
#include <core/engctx.h>
#include <core/falcon.h>
#include <subdev/timer.h>
#include <subdev/fb.h>
...
...
@@ -36,11 +37,11 @@
#include "fuc/nv98.fuc.h"
struct
nv98_crypt_priv
{
struct
nouveau_
crypt
base
;
struct
nouveau_
falcon
base
;
};
struct
nv98_crypt_chan
{
struct
nouveau_
crypt
_chan
base
;
struct
nouveau_
falcon
_chan
base
;
};
/*******************************************************************************
...
...
@@ -66,8 +67,8 @@ nv98_crypt_context_ctor(struct nouveau_object *parent,
struct
nv98_crypt_chan
*
priv
;
int
ret
;
ret
=
nouveau_
crypt
_context_create
(
parent
,
engine
,
oclass
,
NULL
,
256
,
256
,
NVOBJ_FLAG_ZERO_ALLOC
,
&
priv
);
ret
=
nouveau_
falcon
_context_create
(
parent
,
engine
,
oclass
,
NULL
,
256
,
256
,
NVOBJ_FLAG_ZERO_ALLOC
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
...
...
@@ -80,11 +81,11 @@ nv98_crypt_cclass = {
.
handle
=
NV_ENGCTX
(
CRYPT
,
0x98
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv98_crypt_context_ctor
,
.
dtor
=
_nouveau_
crypt
_context_dtor
,
.
init
=
_nouveau_
crypt
_context_init
,
.
fini
=
_nouveau_
crypt
_context_fini
,
.
rd32
=
_nouveau_
crypt
_context_rd32
,
.
wr32
=
_nouveau_
crypt
_context_wr32
,
.
dtor
=
_nouveau_
falcon
_context_dtor
,
.
init
=
_nouveau_
falcon
_context_init
,
.
fini
=
_nouveau_
falcon
_context_fini
,
.
rd32
=
_nouveau_
falcon
_context_rd32
,
.
wr32
=
_nouveau_
falcon
_context_wr32
,
},
};
...
...
@@ -153,7 +154,8 @@ nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct
nv98_crypt_priv
*
priv
;
int
ret
;
ret
=
nouveau_crypt_create
(
parent
,
engine
,
oclass
,
&
priv
);
ret
=
nouveau_falcon_create
(
parent
,
engine
,
oclass
,
0x087000
,
true
,
"PCRYPT"
,
"crypt"
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
...
...
@@ -163,36 +165,10 @@ nv98_crypt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
nv_engine
(
priv
)
->
cclass
=
&
nv98_crypt_cclass
;
nv_engine
(
priv
)
->
sclass
=
nv98_crypt_sclass
;
nv_engine
(
priv
)
->
tlb_flush
=
nv98_crypt_tlb_flush
;
return
0
;
}
static
int
nv98_crypt_init
(
struct
nouveau_object
*
object
)
{
struct
nv98_crypt_priv
*
priv
=
(
void
*
)
object
;
int
ret
,
i
;
ret
=
nouveau_crypt_init
(
&
priv
->
base
);
if
(
ret
)
return
ret
;
/* wait for exit interrupt to signal */
nv_wait
(
priv
,
0x087008
,
0x00000010
,
0x00000010
);
nv_wr32
(
priv
,
0x087004
,
0x00000010
);
/* upload microcode code and data segments */
nv_wr32
(
priv
,
0x087ff8
,
0x00100000
);
for
(
i
=
0
;
i
<
ARRAY_SIZE
(
nv98_pcrypt_code
);
i
++
)
nv_wr32
(
priv
,
0x087ff4
,
nv98_pcrypt_code
[
i
]);
nv_wr32
(
priv
,
0x087ff8
,
0x00000000
);
for
(
i
=
0
;
i
<
ARRAY_SIZE
(
nv98_pcrypt_data
);
i
++
)
nv_wr32
(
priv
,
0x087ff4
,
nv98_pcrypt_data
[
i
]);
/* start it running */
nv_wr32
(
priv
,
0x08710c
,
0x00000000
);
nv_wr32
(
priv
,
0x087104
,
0x00000000
);
/* ENTRY */
nv_wr32
(
priv
,
0x087100
,
0x00000002
);
/* TRIGGER */
nv_falcon
(
priv
)
->
code
.
data
=
nv98_pcrypt_code
;
nv_falcon
(
priv
)
->
code
.
size
=
sizeof
(
nv98_pcrypt_code
);
nv_falcon
(
priv
)
->
data
.
data
=
nv98_pcrypt_data
;
nv_falcon
(
priv
)
->
data
.
size
=
sizeof
(
nv98_pcrypt_data
);
return
0
;
}
...
...
@@ -201,8 +177,10 @@ nv98_crypt_oclass = {
.
handle
=
NV_ENGINE
(
CRYPT
,
0x98
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv98_crypt_ctor
,
.
dtor
=
_nouveau_crypt_dtor
,
.
init
=
nv98_crypt_init
,
.
fini
=
_nouveau_crypt_fini
,
.
dtor
=
_nouveau_falcon_dtor
,
.
init
=
_nouveau_falcon_init
,
.
fini
=
_nouveau_falcon_fini
,
.
rd32
=
_nouveau_falcon_rd32
,
.
wr32
=
_nouveau_falcon_wr32
,
},
};
drivers/gpu/drm/nouveau/core/include/engine/crypt.h
View file @
27abc13e
#ifndef __NOUVEAU_CRYPT_H__
#define __NOUVEAU_CRYPT_H__
#include <core/engine.h>
#include <core/engctx.h>
struct
nouveau_crypt_chan
{
struct
nouveau_engctx
base
;
};
#define nouveau_crypt_context_create(p,e,c,g,s,a,f,d) \
nouveau_engctx_create((p), (e), (c), (g), (s), (a), (f), (d))
#define nouveau_crypt_context_destroy(d) \
nouveau_engctx_destroy(&(d)->base)
#define nouveau_crypt_context_init(d) \
nouveau_engctx_init(&(d)->base)
#define nouveau_crypt_context_fini(d,s) \
nouveau_engctx_fini(&(d)->base, (s))
#define _nouveau_crypt_context_dtor _nouveau_engctx_dtor
#define _nouveau_crypt_context_init _nouveau_engctx_init
#define _nouveau_crypt_context_fini _nouveau_engctx_fini
#define _nouveau_crypt_context_rd32 _nouveau_engctx_rd32
#define _nouveau_crypt_context_wr32 _nouveau_engctx_wr32
struct
nouveau_crypt
{
struct
nouveau_engine
base
;
};
#define nouveau_crypt_create(p,e,c,d) \
nouveau_engine_create((p), (e), (c), true, "PCRYPT", "crypt", (d))
#define nouveau_crypt_destroy(d) \
nouveau_engine_destroy(&(d)->base)
#define nouveau_crypt_init(d) \
nouveau_engine_init(&(d)->base)
#define nouveau_crypt_fini(d,s) \
nouveau_engine_fini(&(d)->base, (s))
#define _nouveau_crypt_dtor _nouveau_engine_dtor
#define _nouveau_crypt_init _nouveau_engine_init
#define _nouveau_crypt_fini _nouveau_engine_fini
extern
struct
nouveau_oclass
nv84_crypt_oclass
;
extern
struct
nouveau_oclass
nv98_crypt_oclass
;
...
...
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