Commit 2ae111cd authored by Cyrill Gorcunov's avatar Cyrill Gorcunov Committed by Ingo Molnar

x86: apic interrupts - move assignments to irqinit_32.c, v2

64bit mode APIC interrupt handlers are set within irqinit_64.c.
Lets do tha same for 32bit mode which would help in furter code merging.
Signed-off-by: default avatarCyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 15dd859c
...@@ -1354,54 +1354,6 @@ void smp_error_interrupt(struct pt_regs *regs) ...@@ -1354,54 +1354,6 @@ void smp_error_interrupt(struct pt_regs *regs)
irq_exit(); irq_exit();
} }
#ifdef CONFIG_SMP
void __init smp_intr_init(void)
{
/*
* IRQ0 must be given a fixed assignment and initialized,
* because it's used before the IO-APIC is set up.
*/
set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
/*
* The reschedule interrupt is a CPU-to-CPU reschedule-helper
* IPI, driven by wakeup.
*/
alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
/* IPI for invalidation */
alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
/* IPI for generic function call */
alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
/* IPI for single call function */
set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
call_function_single_interrupt);
}
#endif
/*
* Initialize APIC interrupts
*/
void __init apic_intr_init(void)
{
#ifdef CONFIG_SMP
smp_intr_init();
#endif
/* self generated IPI for local APIC timer */
alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
/* IPI vectors for APIC spurious and error interrupts */
alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
/* thermal monitor LVT interrupt */
#ifdef CONFIG_X86_MCE_P4THERMAL
alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
#endif
}
/** /**
* connect_bsp_APIC - attach the APIC to the interrupt system * connect_bsp_APIC - attach the APIC to the interrupt system
*/ */
......
...@@ -74,6 +74,15 @@ void __init init_ISA_irqs (void) ...@@ -74,6 +74,15 @@ void __init init_ISA_irqs (void)
} }
} }
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade",
};
/* Overridden in paravirt.c */ /* Overridden in paravirt.c */
void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
...@@ -98,6 +107,46 @@ void __init native_init_IRQ(void) ...@@ -98,6 +107,46 @@ void __init native_init_IRQ(void)
set_intr_gate(vector, interrupt[i]); set_intr_gate(vector, interrupt[i]);
} }
#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP)
/*
* IRQ0 must be given a fixed assignment and initialized,
* because it's used before the IO-APIC is set up.
*/
set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
/*
* The reschedule interrupt is a CPU-to-CPU reschedule-helper
* IPI, driven by wakeup.
*/
alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
/* IPI for invalidation */
alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
/* IPI for generic function call */
alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
/* IPI for single call function */
set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt);
#endif
#ifdef CONFIG_X86_LOCAL_APIC
/* self generated IPI for local APIC timer */
alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
/* IPI vectors for APIC spurious and error interrupts */
alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
#endif
#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
/* thermal monitor LVT interrupt */
alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
#endif
if (!acpi_ioapic)
setup_irq(2, &irq2);
/* setup after call gates are initialised (usually add in /* setup after call gates are initialised (usually add in
* the architecture specific gates) * the architecture specific gates)
*/ */
......
...@@ -36,15 +36,6 @@ void __init pre_intr_init_hook(void) ...@@ -36,15 +36,6 @@ void __init pre_intr_init_hook(void)
init_ISA_irqs(); init_ISA_irqs();
} }
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade",
};
/** /**
* intr_init_hook - post gate setup interrupt initialisation * intr_init_hook - post gate setup interrupt initialisation
* *
...@@ -60,12 +51,6 @@ void __init intr_init_hook(void) ...@@ -60,12 +51,6 @@ void __init intr_init_hook(void)
if (x86_quirks->arch_intr_init()) if (x86_quirks->arch_intr_init())
return; return;
} }
#ifdef CONFIG_X86_LOCAL_APIC
apic_intr_init();
#endif
if (!acpi_ioapic)
setup_irq(2, &irq2);
} }
/** /**
......
...@@ -12,8 +12,6 @@ ...@@ -12,8 +12,6 @@
/* these aren't arch hooks, they are generic routines /* these aren't arch hooks, they are generic routines
* that can be used by the hooks */ * that can be used by the hooks */
extern void init_ISA_irqs(void); extern void init_ISA_irqs(void);
extern void apic_intr_init(void);
extern void smp_intr_init(void);
extern irqreturn_t timer_interrupt(int irq, void *dev_id); extern irqreturn_t timer_interrupt(int irq, void *dev_id);
/* these are the defined hooks */ /* these are the defined hooks */
......
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