Commit 2b722039 authored by Dave Jones's avatar Dave Jones

[AGPGART] use symbols instead of hardcoded values in generic-3.0

Lots more work to do here.
parent 7895a3f6
...@@ -412,8 +412,18 @@ u32 agp_collect_device_status(u32 mode, u32 command); ...@@ -412,8 +412,18 @@ u32 agp_collect_device_status(u32 mode, u32 command);
void agp_device_command(u32 command, int agp_v3); void agp_device_command(u32 command, int agp_v3);
int agp_3_0_node_enable(u32 mode, u32 minor); int agp_3_0_node_enable(u32 mode, u32 minor);
/* Standard agp registers */
#define AGPSTAT 0x4
#define AGPCMD 0x8
#define AGPNEPG 0x16
#define AGP_MAJOR_VERSION_SHIFT (20)
#define AGP_MINOR_VERSION_SHIFT (16)
#define AGPSTAT_RQ_DEPTH (0xff000000) #define AGPSTAT_RQ_DEPTH (0xff000000)
#define AGPSTAT_ARQSZ_SHIFT 13
#define AGPSTAT_AGP_ENABLE (1<<8) #define AGPSTAT_AGP_ENABLE (1<<8)
#define AGPSTAT_SBA (1<<9) #define AGPSTAT_SBA (1<<9)
......
...@@ -118,7 +118,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne ...@@ -118,7 +118,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne
goto free_and_exit; goto free_and_exit;
pci_read_config_dword(td, agp_bridge->capndx + 0x0c, &tnistat); pci_read_config_dword(td, agp_bridge->capndx + 0x0c, &tnistat);
pci_read_config_dword(td, agp_bridge->capndx + 0x04, &tstatus); pci_read_config_dword(td, agp_bridge->capndx+AGPSTAT, &tstatus);
/* Extract power-on defaults from the target */ /* Extract power-on defaults from the target */
target.maxbw = (tnistat >> 16) & 0xff; target.maxbw = (tnistat >> 16) & 0xff;
...@@ -260,7 +260,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne ...@@ -260,7 +260,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne
? (rem_async + rem_isoch) : step; ? (rem_async + rem_isoch) : step;
pci_read_config_word(dev, cur->capndx + 0x20, &mnicmd); pci_read_config_word(dev, cur->capndx + 0x20, &mnicmd);
pci_read_config_dword(dev, cur->capndx + 0x08, &mcmd); pci_read_config_dword(dev, cur->capndx+AGPCMD, &mcmd);
mnicmd &= ~(0xff << 8); mnicmd &= ~(0xff << 8);
mnicmd &= ~(0x3 << 6); mnicmd &= ~(0x3 << 6);
...@@ -270,7 +270,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne ...@@ -270,7 +270,7 @@ static int agp_3_0_isochronous_node_enable(struct agp_3_0_dev *dev_list, unsigne
mnicmd |= master[cdev].y << 6; mnicmd |= master[cdev].y << 6;
mcmd |= master[cdev].rq << 24; mcmd |= master[cdev].rq << 24;
pci_write_config_dword(dev, cur->capndx + 0x08, mcmd); pci_write_config_dword(dev, cur->capndx+AGPCMD, mcmd);
pci_write_config_word(dev, cur->capndx + 0x20, mnicmd); pci_write_config_word(dev, cur->capndx + 0x20, mnicmd);
} }
...@@ -306,10 +306,10 @@ static int agp_3_0_nonisochronous_node_enable(struct agp_3_0_dev *dev_list, unsi ...@@ -306,10 +306,10 @@ static int agp_3_0_nonisochronous_node_enable(struct agp_3_0_dev *dev_list, unsi
for(pos = head->next; cdev < ndevs; cdev++, pos = pos->next) { for(pos = head->next; cdev < ndevs; cdev++, pos = pos->next) {
cur = list_entry(pos, struct agp_3_0_dev, list); cur = list_entry(pos, struct agp_3_0_dev, list);
pci_read_config_dword(cur->dev, cur->capndx + 0x08, &mcmd); pci_read_config_dword(cur->dev, cur->capndx+AGPCMD, &mcmd);
mcmd &= ~(0xff << 24); mcmd &= ~(0xff << 24);
mcmd |= ((cdev == ndevs - 1) ? rem : mrq) << 24; mcmd |= ((cdev == ndevs - 1) ? rem : mrq) << 24;
pci_write_config_dword(cur->dev, cur->capndx + 0x08, mcmd); pci_write_config_dword(cur->dev, cur->capndx+AGPCMD, mcmd);
} }
return 0; return 0;
...@@ -419,8 +419,8 @@ int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -419,8 +419,8 @@ int agp_3_0_node_enable(u32 mode, u32 minor)
goto free_and_exit; goto free_and_exit;
} }
mmajor = (ncapid >> 20) & 0xf; mmajor = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
mminor = (ncapid >> 16) & 0xf; mminor = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
if(mmajor < 3) { if(mmajor < 3) {
printk(KERN_ERR PFX "woah! AGP 2.0 device " printk(KERN_ERR PFX "woah! AGP 2.0 device "
...@@ -487,7 +487,7 @@ int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -487,7 +487,7 @@ int agp_3_0_node_enable(u32 mode, u32 minor)
* Also set the AGP_ENABLE bit, effectively 'turning on' the * Also set the AGP_ENABLE bit, effectively 'turning on' the
* target (this has to be done _before_ turning on the masters). * target (this has to be done _before_ turning on the masters).
*/ */
pci_read_config_dword(td, agp_bridge->capndx + 0x08, &tcmd); pci_read_config_dword(td, agp_bridge->capndx+AGPCMD, &tcmd);
tcmd &= ~(0x7 << 10); tcmd &= ~(0x7 << 10);
tcmd &= ~0x7; tcmd &= ~0x7;
...@@ -496,7 +496,7 @@ int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -496,7 +496,7 @@ int agp_3_0_node_enable(u32 mode, u32 minor)
tcmd |= 0x1 << 8; tcmd |= 0x1 << 8;
tcmd |= rate; tcmd |= rate;
pci_write_config_dword(td, agp_bridge->capndx + 0x08, tcmd); pci_write_config_dword(td, agp_bridge->capndx+AGPCMD, tcmd);
/* /*
* Set the target's advertised arqsz value, the minimum supported * Set the target's advertised arqsz value, the minimum supported
...@@ -509,16 +509,16 @@ int agp_3_0_node_enable(u32 mode, u32 minor) ...@@ -509,16 +509,16 @@ int agp_3_0_node_enable(u32 mode, u32 minor)
mcapndx = cur->capndx; mcapndx = cur->capndx;
pci_read_config_dword(dev, cur->capndx + 0x08, &mcmd); pci_read_config_dword(dev, cur->capndx+AGPCMD, &mcmd);
mcmd &= ~(0x7 << 13); mcmd &= ~(0x7 << AGPSTAT_ARQSZ_SHIFT);
mcmd &= ~0x7; mcmd &= ~0x7;
mcmd |= arqsz << 13; mcmd |= arqsz << 13;
mcmd |= 0x1 << 8; mcmd |= AGPSTAT_AGP_ENABLE;
mcmd |= rate; mcmd |= rate;
pci_write_config_dword(dev, cur->capndx + 0x08, mcmd); pci_write_config_dword(dev, cur->capndx+AGPCMD, mcmd);
} }
free_and_exit: free_and_exit:
......
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