Commit 2bde7c32 authored by Hans de Goede's avatar Hans de Goede Committed by Rafael J. Wysocki

ACPI / PMIC: xpower: Fix power_table addresses

The power table addresses should be contiguous, but there was a hole
where 0x34 was missing. On most devices this is not a problem as
addresses above 0x34 are used for the BUC# convertors which are not
used in the DSDTs I've access to but after the BUC# convertors
there is a field named GPI1 in the DSTDs, which does get used in some
cases and ended up turning BUC6 on and off due to the wrong addresses,
resulting in turning the entire device off (or causing it to reboot).

Removing the hole in the addresses fixes this, fixing one of my
Bay Trail tablets turning off while booting the mainline kernel.

While at it add comments with the field names used in the DSDTs to
make it easier to compare the register and bits used at each address
with the datasheet.
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 2e5a7f71
...@@ -27,97 +27,97 @@ static struct pmic_table power_table[] = { ...@@ -27,97 +27,97 @@ static struct pmic_table power_table[] = {
.address = 0x00, .address = 0x00,
.reg = 0x13, .reg = 0x13,
.bit = 0x05, .bit = 0x05,
}, }, /* ALD1 */
{ {
.address = 0x04, .address = 0x04,
.reg = 0x13, .reg = 0x13,
.bit = 0x06, .bit = 0x06,
}, }, /* ALD2 */
{ {
.address = 0x08, .address = 0x08,
.reg = 0x13, .reg = 0x13,
.bit = 0x07, .bit = 0x07,
}, }, /* ALD3 */
{ {
.address = 0x0c, .address = 0x0c,
.reg = 0x12, .reg = 0x12,
.bit = 0x03, .bit = 0x03,
}, }, /* DLD1 */
{ {
.address = 0x10, .address = 0x10,
.reg = 0x12, .reg = 0x12,
.bit = 0x04, .bit = 0x04,
}, }, /* DLD2 */
{ {
.address = 0x14, .address = 0x14,
.reg = 0x12, .reg = 0x12,
.bit = 0x05, .bit = 0x05,
}, }, /* DLD3 */
{ {
.address = 0x18, .address = 0x18,
.reg = 0x12, .reg = 0x12,
.bit = 0x06, .bit = 0x06,
}, }, /* DLD4 */
{ {
.address = 0x1c, .address = 0x1c,
.reg = 0x12, .reg = 0x12,
.bit = 0x00, .bit = 0x00,
}, }, /* ELD1 */
{ {
.address = 0x20, .address = 0x20,
.reg = 0x12, .reg = 0x12,
.bit = 0x01, .bit = 0x01,
}, }, /* ELD2 */
{ {
.address = 0x24, .address = 0x24,
.reg = 0x12, .reg = 0x12,
.bit = 0x02, .bit = 0x02,
}, }, /* ELD3 */
{ {
.address = 0x28, .address = 0x28,
.reg = 0x13, .reg = 0x13,
.bit = 0x02, .bit = 0x02,
}, }, /* FLD1 */
{ {
.address = 0x2c, .address = 0x2c,
.reg = 0x13, .reg = 0x13,
.bit = 0x03, .bit = 0x03,
}, }, /* FLD2 */
{ {
.address = 0x30, .address = 0x30,
.reg = 0x13, .reg = 0x13,
.bit = 0x04, .bit = 0x04,
}, }, /* FLD3 */
{ {
.address = 0x38, .address = 0x34,
.reg = 0x10, .reg = 0x10,
.bit = 0x03, .bit = 0x03,
}, }, /* BUC1 */
{ {
.address = 0x3c, .address = 0x38,
.reg = 0x10, .reg = 0x10,
.bit = 0x06, .bit = 0x06,
}, }, /* BUC2 */
{ {
.address = 0x40, .address = 0x3c,
.reg = 0x10, .reg = 0x10,
.bit = 0x05, .bit = 0x05,
}, }, /* BUC3 */
{ {
.address = 0x44, .address = 0x40,
.reg = 0x10, .reg = 0x10,
.bit = 0x04, .bit = 0x04,
}, }, /* BUC4 */
{ {
.address = 0x48, .address = 0x44,
.reg = 0x10, .reg = 0x10,
.bit = 0x01, .bit = 0x01,
}, }, /* BUC5 */
{ {
.address = 0x4c, .address = 0x48,
.reg = 0x10, .reg = 0x10,
.bit = 0x00 .bit = 0x00
}, }, /* BUC6 */
}; };
/* TMP0 - TMP5 are the same, all from GPADC */ /* TMP0 - TMP5 are the same, all from GPADC */
......
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