Commit 2e581407 authored by Andrew Vasquez's avatar Andrew Vasquez Committed by James Bottomley

qla2xxx: NVRAM updates

Address several NVRAM access issues:

     o Add support for write-protected NVRAM chips used with
       ISP2322 and ISP6322.
     o Correct code to not perform an erase data during NVRAM
       update.
     o Correct issuance of NVRAM delay after PCI posting call.
Signed-off-by: default avatarAndrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent ceb2a252
...@@ -346,6 +346,8 @@ typedef volatile struct { ...@@ -346,6 +346,8 @@ typedef volatile struct {
volatile uint16_t nvram; /* NVRAM register. */ volatile uint16_t nvram; /* NVRAM register. */
#define NVR_DESELECT 0 #define NVR_DESELECT 0
#define NVR_BUSY BIT_15 #define NVR_BUSY BIT_15
#define NVR_WRT_ENABLE BIT_14 /* Write enable */
#define NVR_PR_ENABLE BIT_13 /* Protection register enable */
#define NVR_DATA_IN BIT_3 #define NVR_DATA_IN BIT_3
#define NVR_DATA_OUT BIT_2 #define NVR_DATA_OUT BIT_2
#define NVR_SELECT BIT_1 #define NVR_SELECT BIT_1
......
...@@ -212,6 +212,7 @@ extern void qla2x00_process_response_queue(struct scsi_qla_host *); ...@@ -212,6 +212,7 @@ extern void qla2x00_process_response_queue(struct scsi_qla_host *);
*/ */
extern void qla2x00_lock_nvram_access(scsi_qla_host_t *); extern void qla2x00_lock_nvram_access(scsi_qla_host_t *);
extern void qla2x00_unlock_nvram_access(scsi_qla_host_t *); extern void qla2x00_unlock_nvram_access(scsi_qla_host_t *);
extern void qla2x00_release_nvram_protection(scsi_qla_host_t *);
extern uint16_t qla2x00_get_nvram_word(scsi_qla_host_t *, uint32_t); extern uint16_t qla2x00_get_nvram_word(scsi_qla_host_t *, uint32_t);
extern void qla2x00_write_nvram_word(scsi_qla_host_t *, uint32_t, uint16_t); extern void qla2x00_write_nvram_word(scsi_qla_host_t *, uint32_t, uint16_t);
/* /*
......
...@@ -566,6 +566,7 @@ static ssize_t qla2x00_sysfs_write_nvram(struct kobject *kobj, char *buf, ...@@ -566,6 +566,7 @@ static ssize_t qla2x00_sysfs_write_nvram(struct kobject *kobj, char *buf,
/* Write NVRAM. */ /* Write NVRAM. */
spin_lock_irqsave(&ha->hardware_lock, flags); spin_lock_irqsave(&ha->hardware_lock, flags);
qla2x00_lock_nvram_access(ha); qla2x00_lock_nvram_access(ha);
qla2x00_release_nvram_protection(ha);
witer = (uint16_t *)buf; witer = (uint16_t *)buf;
for (cnt = 0; cnt < count / 2; cnt++) { for (cnt = 0; cnt < count / 2; cnt++) {
qla2x00_write_nvram_word(ha, cnt+ha->nvram_base, qla2x00_write_nvram_word(ha, cnt+ha->nvram_base,
......
...@@ -26,7 +26,6 @@ static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t); ...@@ -26,7 +26,6 @@ static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t);
static void qla2x00_nv_deselect(scsi_qla_host_t *); static void qla2x00_nv_deselect(scsi_qla_host_t *);
static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t); static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t);
/* /*
* NVRAM support routines * NVRAM support routines
*/ */
...@@ -79,6 +78,56 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha) ...@@ -79,6 +78,56 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
} }
} }
/**
* qla2x00_release_nvram_protection() -
* @ha: HA context
*/
void
qla2x00_release_nvram_protection(scsi_qla_host_t *ha)
{
device_reg_t *reg;
uint32_t word;
reg = ha->iobase;
/* Release NVRAM write protection. */
if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
/* Write enable. */
qla2x00_nv_write(ha, NVR_DATA_OUT);
qla2x00_nv_write(ha, 0);
qla2x00_nv_write(ha, 0);
for (word = 0; word < 8; word++)
qla2x00_nv_write(ha, NVR_DATA_OUT);
qla2x00_nv_deselect(ha);
/* Enable protection register. */
qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
qla2x00_nv_write(ha, NVR_PR_ENABLE);
qla2x00_nv_write(ha, NVR_PR_ENABLE);
for (word = 0; word < 8; word++)
qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
qla2x00_nv_deselect(ha);
/* Clear protection register (ffff is cleared). */
qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
for (word = 0; word < 8; word++)
qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
qla2x00_nv_deselect(ha);
/* Wait for NVRAM to become ready. */
WRT_REG_WORD(&reg->nvram, NVR_SELECT);
do {
NVRAM_DELAY();
word = RD_REG_WORD(&reg->nvram);
} while ((word & NVR_DATA_IN) == 0);
}
}
/** /**
* qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the * qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the
* request routine to get the word from NVRAM. * request routine to get the word from NVRAM.
...@@ -123,29 +172,6 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) ...@@ -123,29 +172,6 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
qla2x00_nv_deselect(ha); qla2x00_nv_deselect(ha);
/* Erase Location */
nv_cmd = (addr << 16) | NV_ERASE_OP;
nv_cmd <<= 5;
for (count = 0; count < 11; count++) {
if (nv_cmd & BIT_31)
qla2x00_nv_write(ha, NVR_DATA_OUT);
else
qla2x00_nv_write(ha, 0);
nv_cmd <<= 1;
}
qla2x00_nv_deselect(ha);
/* Wait for Erase to Finish */
WRT_REG_WORD(&reg->nvram, NVR_SELECT);
do {
NVRAM_DELAY();
word = RD_REG_WORD(&reg->nvram);
} while ((word & NVR_DATA_IN) == 0);
qla2x00_nv_deselect(ha);
/* Write data */ /* Write data */
nv_cmd = (addr << 16) | NV_WRITE_OP; nv_cmd = (addr << 16) | NV_WRITE_OP;
nv_cmd |= data; nv_cmd |= data;
...@@ -220,14 +246,14 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd) ...@@ -220,14 +246,14 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
if (reg_data & NVR_DATA_IN) if (reg_data & NVR_DATA_IN)
data |= BIT_0; data |= BIT_0;
WRT_REG_WORD(&reg->nvram, NVR_SELECT); WRT_REG_WORD(&reg->nvram, NVR_SELECT);
NVRAM_DELAY();
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
NVRAM_DELAY();
} }
/* Deselect chip. */ /* Deselect chip. */
WRT_REG_WORD(&reg->nvram, NVR_DESELECT); WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
NVRAM_DELAY();
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
NVRAM_DELAY();
return (data); return (data);
} }
...@@ -236,14 +262,14 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd) ...@@ -236,14 +262,14 @@ qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
* qla2x00_nv_write() - Clean NVRAM operations. * qla2x00_nv_write() - Clean NVRAM operations.
* @ha: HA context * @ha: HA context
*/ */
void static void
qla2x00_nv_deselect(scsi_qla_host_t *ha) qla2x00_nv_deselect(scsi_qla_host_t *ha)
{ {
device_reg_t __iomem *reg = ha->iobase; device_reg_t __iomem *reg = ha->iobase;
WRT_REG_WORD(&reg->nvram, NVR_DESELECT); WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
NVRAM_DELAY();
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
NVRAM_DELAY();
} }
/** /**
...@@ -251,19 +277,20 @@ qla2x00_nv_deselect(scsi_qla_host_t *ha) ...@@ -251,19 +277,20 @@ qla2x00_nv_deselect(scsi_qla_host_t *ha)
* @ha: HA context * @ha: HA context
* @data: Serial interface selector * @data: Serial interface selector
*/ */
void static void
qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data) qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data)
{ {
device_reg_t __iomem *reg = ha->iobase; device_reg_t __iomem *reg = ha->iobase;
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT); WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
NVRAM_DELAY();
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_CLOCK);
NVRAM_DELAY(); NVRAM_DELAY();
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT| NVR_CLOCK |
NVR_WRT_ENABLE);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT);
NVRAM_DELAY(); NVRAM_DELAY();
WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
NVRAM_DELAY();
} }
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