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Commit 32a54d4b authored by David S. Miller's avatar David S. Miller
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Merge nuts.ninka.net:/home/davem/src/BK/tg3-2.5 

into nuts.ninka.net:/disk1/davem/BK/tg3-2.5
parents 94dffce6 bfbed2b7
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drivers/net/tg3.c
View file @ 32a54d4b
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drivers/net/tg3.h
View file @ 32a54d4b
......@@ -24,6 +24,7 @@
#define RX_COPY_THRESHOLD 256
#define RX_STD_MAX_SIZE 1536
#define RX_STD_MAX_SIZE_5705 512
#define RX_JUMBO_MAX_SIZE 0xdeadbeef /* XXX */
/* First 256 bytes are a mirror of PCI config space. */
......@@ -59,7 +60,7 @@
#define PCIX_CAPS_SPLIT_SHIFT 20
#define PCIX_CAPS_BURST_MASK 0x000c0000
#define PCIX_CAPS_BURST_SHIFT 18
#define PCIX_CAPS_MAX_BURST_5704 2
#define PCIX_CAPS_MAX_BURST_CPIOB 2
#define TG3PCI_PM_CAP_PTR 0x00000041
#define TG3PCI_X_COMMAND 0x00000042
#define TG3PCI_X_STATUS 0x00000044
......@@ -115,11 +116,14 @@
#define CHIPREV_ID_5704_A0 0x2000
#define CHIPREV_ID_5704_A1 0x2001
#define CHIPREV_ID_5704_A2 0x2002
#define CHIPREV_ID_5705_A0 0x3000
#define CHIPREV_ID_5705_A1 0x3001
#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
#define ASIC_REV_5700 0x07
#define ASIC_REV_5701 0x00
#define ASIC_REV_5703 0x01
#define ASIC_REV_5704 0x02
#define ASIC_REV_5705 0x03
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
......@@ -180,6 +184,9 @@
#define CLOCK_CTRL_ALTCLK 0x00001000
#define CLOCK_CTRL_PWRDOWN_PLL133 0x00008000
#define CLOCK_CTRL_44MHZ_CORE 0x00040000
#define CLOCK_CTRL_625_CORE 0x00100000
#define CLOCK_CTRL_FORCE_CLKRUN 0x00200000
#define CLOCK_CTRL_CLKRUN_OENABLE 0x00400000
#define CLOCK_CTRL_DELAY_PCI_GRANT 0x80000000
#define TG3PCI_REG_BASE_ADDR 0x00000078
#define TG3PCI_MEM_WIN_BASE_ADDR 0x0000007c
......@@ -457,17 +464,89 @@
#define MAC_RCV_RULE_CFG 0x00000500
#define RCV_RULE_CFG_DEFAULT_CLASS 0x00000008
#define MAC_LOW_WMARK_MAX_RX_FRAME 0x00000504
/* 0x504 --> 0x590 unused */
/* 0x508 --> 0x520 unused */
#define MAC_HASHREGU_0 0x00000520
#define MAC_HASHREGU_1 0x00000524
#define MAC_HASHREGU_2 0x00000528
#define MAC_HASHREGU_3 0x0000052c
#define MAC_EXTADDR_0_HIGH 0x00000530
#define MAC_EXTADDR_0_LOW 0x00000534
#define MAC_EXTADDR_1_HIGH 0x00000538
#define MAC_EXTADDR_1_LOW 0x0000053c
#define MAC_EXTADDR_2_HIGH 0x00000540
#define MAC_EXTADDR_2_LOW 0x00000544
#define MAC_EXTADDR_3_HIGH 0x00000548
#define MAC_EXTADDR_3_LOW 0x0000054c
#define MAC_EXTADDR_4_HIGH 0x00000550
#define MAC_EXTADDR_4_LOW 0x00000554
#define MAC_EXTADDR_5_HIGH 0x00000558
#define MAC_EXTADDR_5_LOW 0x0000055c
#define MAC_EXTADDR_6_HIGH 0x00000560
#define MAC_EXTADDR_6_LOW 0x00000564
#define MAC_EXTADDR_7_HIGH 0x00000568
#define MAC_EXTADDR_7_LOW 0x0000056c
#define MAC_EXTADDR_8_HIGH 0x00000570
#define MAC_EXTADDR_8_LOW 0x00000574
#define MAC_EXTADDR_9_HIGH 0x00000578
#define MAC_EXTADDR_9_LOW 0x0000057c
#define MAC_EXTADDR_10_HIGH 0x00000580
#define MAC_EXTADDR_10_LOW 0x00000584
#define MAC_EXTADDR_11_HIGH 0x00000588
#define MAC_EXTADDR_11_LOW 0x0000058c
#define MAC_SERDES_CFG 0x00000590
#define MAC_SERDES_STAT 0x00000594
/* 0x598 --> 0x600 unused */
#define MAC_TX_MAC_STATE_BASE 0x00000600 /* 16 bytes */
#define MAC_RX_MAC_STATE_BASE 0x00000610 /* 20 bytes */
/* 0x624 --> 0x800 unused */
#define MAC_RX_STATS_BASE 0x00000800 /* 26 32-bit words */
/* 0x868 --> 0x880 unused */
#define MAC_TX_STATS_BASE 0x00000880 /* 28 32-bit words */
/* 0x8f0 --> 0xc00 unused */
#define MAC_TX_STATS_OCTETS 0x00000800
#define MAC_TX_STATS_RESV1 0x00000804
#define MAC_TX_STATS_COLLISIONS 0x00000808
#define MAC_TX_STATS_XON_SENT 0x0000080c
#define MAC_TX_STATS_XOFF_SENT 0x00000810
#define MAC_TX_STATS_RESV2 0x00000814
#define MAC_TX_STATS_MAC_ERRORS 0x00000818
#define MAC_TX_STATS_SINGLE_COLLISIONS 0x0000081c
#define MAC_TX_STATS_MULT_COLLISIONS 0x00000820
#define MAC_TX_STATS_DEFERRED 0x00000824
#define MAC_TX_STATS_RESV3 0x00000828
#define MAC_TX_STATS_EXCESSIVE_COL 0x0000082c
#define MAC_TX_STATS_LATE_COL 0x00000830
#define MAC_TX_STATS_RESV4_1 0x00000834
#define MAC_TX_STATS_RESV4_2 0x00000838
#define MAC_TX_STATS_RESV4_3 0x0000083c
#define MAC_TX_STATS_RESV4_4 0x00000840
#define MAC_TX_STATS_RESV4_5 0x00000844
#define MAC_TX_STATS_RESV4_6 0x00000848
#define MAC_TX_STATS_RESV4_7 0x0000084c
#define MAC_TX_STATS_RESV4_8 0x00000850
#define MAC_TX_STATS_RESV4_9 0x00000854
#define MAC_TX_STATS_RESV4_10 0x00000858
#define MAC_TX_STATS_RESV4_11 0x0000085c
#define MAC_TX_STATS_RESV4_12 0x00000860
#define MAC_TX_STATS_RESV4_13 0x00000864
#define MAC_TX_STATS_RESV4_14 0x00000868
#define MAC_TX_STATS_UCAST 0x0000086c
#define MAC_TX_STATS_MCAST 0x00000870
#define MAC_TX_STATS_BCAST 0x00000874
#define MAC_TX_STATS_RESV5_1 0x00000878
#define MAC_TX_STATS_RESV5_2 0x0000087c
#define MAC_RX_STATS_OCTETS 0x00000880
#define MAC_RX_STATS_RESV1 0x00000884
#define MAC_RX_STATS_FRAGMENTS 0x00000888
#define MAC_RX_STATS_UCAST 0x0000088c
#define MAC_RX_STATS_MCAST 0x00000890
#define MAC_RX_STATS_BCAST 0x00000894
#define MAC_RX_STATS_FCS_ERRORS 0x00000898
#define MAC_RX_STATS_ALIGN_ERRORS 0x0000089c
#define MAC_RX_STATS_XON_PAUSE_RECVD 0x000008a0
#define MAC_RX_STATS_XOFF_PAUSE_RECVD 0x000008a4
#define MAC_RX_STATS_MAC_CTRL_RECVD 0x000008a8
#define MAC_RX_STATS_XOFF_ENTERED 0x000008ac
#define MAC_RX_STATS_FRAME_TOO_LONG 0x000008b0
#define MAC_RX_STATS_JABBERS 0x000008b4
#define MAC_RX_STATS_UNDERSIZE 0x000008b8
/* 0x8bc --> 0xc00 unused */
/* Send data initiator control registers */
#define SNDDATAI_MODE 0x00000c00
......@@ -599,6 +678,7 @@
#define RCVLPC_STATSCTRL_ENABLE 0x00000001
#define RCVLPC_STATSCTRL_FASTUPD 0x00000002
#define RCVLPC_STATS_ENABLE 0x00002018
#define RCVLPC_STATSENAB_LNGBRST_RFIX 0x00400000
#define RCVLPC_STATS_INCMASK 0x0000201c
/* 0x2020 --> 0x2100 unused */
#define RCVLPC_SELLST_BASE 0x00002100 /* 16 16-byte entries */
......@@ -812,13 +892,16 @@
#define BUFMGR_MB_POOL_ADDR 0x00004408
#define BUFMGR_MB_POOL_SIZE 0x0000440c
#define BUFMGR_MB_RDMA_LOW_WATER 0x00004410
#define DEFAULT_MB_RDMA_LOW_WATER 0x00000040
#define DEFAULT_MB_RDMA_LOW_WATER 0x00000050
#define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000
#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414
#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
#define BUFMGR_MB_HIGH_WATER 0x00004418
#define DEFAULT_MB_HIGH_WATER 0x00000060
#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
#define BUFMGR_MB_ALLOC_BIT 0x10000000
......@@ -854,6 +937,8 @@
#define RDMAC_MODE_LNGREAD_ENAB 0x00000200
#define RDMAC_MODE_SPLIT_ENABLE 0x00000800
#define RDMAC_MODE_SPLIT_RESET 0x00001000
#define RDMAC_MODE_FIFO_SIZE_128 0x00020000
#define RDMAC_MODE_FIFO_LONG_BURST 0x00030000
#define RDMAC_STATUS 0x00004804
#define RDMAC_STATUS_TGTABORT 0x00000004
#define RDMAC_STATUS_MSTABORT 0x00000008
......@@ -877,6 +962,7 @@
#define WDMAC_MODE_FIFOURUN_ENAB 0x00000080
#define WDMAC_MODE_FIFOOREAD_ENAB 0x00000100
#define WDMAC_MODE_LNGREAD_ENAB 0x00000200
#define WDMAC_MODE_RX_ACCEL 0x00000400
#define WDMAC_STATUS 0x00004c04
#define WDMAC_STATUS_TGTABORT 0x00000004
#define WDMAC_STATUS_MSTABORT 0x00000008
......@@ -1140,7 +1226,10 @@
#define GRC_MISC_CFG_BOARD_ID_5704 0x00000000
#define GRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000
#define GRC_MISC_CFG_BOARD_ID_5704_A2 0x00008000
#define GRC_MISC_CFG_BOARD_ID_5788 0x00010000
#define GRC_MISC_CFG_BOARD_ID_5788M 0x00018000
#define GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000
#define GRC_MISC_CFG_KEEP_GPHY_POWER 0x04000000
#define GRC_LOCAL_CTRL 0x00006808
#define GRC_LCLCTRL_INT_ACTIVE 0x00000001
#define GRC_LCLCTRL_CLEARINT 0x00000002
......@@ -1275,6 +1364,7 @@
#define NIC_SRAM_DATA_CFG_WOL_ENABLE 0x00000040
#define NIC_SRAM_DATA_CFG_ASF_ENABLE 0x00000080
#define NIC_SRAM_DATA_CFG_EEPROM_WP 0x00000100
#define NIC_SRAM_DATA_CFG_MINI_PCI 0x00001000
#define NIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000
#define NIC_SRAM_DATA_PHY_ID 0x00000b74
......@@ -1312,6 +1402,8 @@
#define NIC_SRAM_MBUF_POOL_BASE 0x00008000
#define NIC_SRAM_MBUF_POOL_SIZE96 0x00018000
#define NIC_SRAM_MBUF_POOL_SIZE64 0x00010000
#define NIC_SRAM_MBUF_POOL_BASE5705 0x00010000
#define NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000
/* Currently this is fixed. */
#define PHY_ADDR 0x01
......@@ -1824,6 +1916,10 @@ struct tg3 {
u32 tg3_flags2;
#define TG3_FLG2_RESTART_TIMER 0x00000001
#define TG3_FLG2_SUN_5704 0x00000002
#define TG3_FLG2_NO_ETH_WIRE_SPEED 0x00000004
#define TG3_FLG2_IS_5788 0x00000008
#define TG3_FLG2_MAX_RXPEND_64 0x00000010
#define TG3_FLG2_TSO_CAPABLE 0x00000020
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
......@@ -1868,6 +1964,7 @@ struct tg3 {
#define PHY_ID_BCM5701 0x60008110
#define PHY_ID_BCM5703 0x60008160
#define PHY_ID_BCM5704 0x60008190
#define PHY_ID_BCM5705 0x600081a0
#define PHY_ID_BCM8002 0x60010140
#define PHY_ID_SERDES 0xfeedbee0
#define PHY_ID_INVALID 0xffffffff
......@@ -1880,6 +1977,9 @@ struct tg3 {
enum phy_led_mode led_mode;
char board_part_number[24];
u32 nic_sram_data_cfg;
u32 pci_clock_ctrl;
struct pci_dev *pdev_peer;
/* This macro assumes the passed PHY ID is already masked
* with PHY_ID_MASK.
......@@ -1888,6 +1988,7 @@ struct tg3 {
((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
(X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
(X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
(X) == PHY_ID_BCM5705 || \
(X) == PHY_ID_BCM8002 || (X) == PHY_ID_SERDES)
struct tg3_hw_stats *hw_stats;
......
drivers/pci/pci.ids
View file @ 32a54d4b
......@@ -3247,7 +3247,8 @@
1148 5061 SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
1148 5071 SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
1148 9521 SK-9521 10/100/1000Base-T Adapter
4400 Gigabit Ethernet
4400 SK-9Dxx Gigabit Ethernet Adapter
4500 SK-9Mxx Gigabit Ethernet Adapter
1149 Win System Corporation
114a VMIC
5579 VMIPCI-5579 (Reflective Memory Card)
......@@ -5313,9 +5314,12 @@
1166 1648 NetXtreme CIOB-E 1000Base-T
164d NetXtreme BCM5702FE Gigabit Ethernet
1653 NetXtreme BCM5705 Gigabit Ethernet
1654 NetXtreme BCM5705 Gigabit Ethernet
165d NetXtreme BCM5705M Gigabit Ethernet
165e NetXtreme BCM5705M Gigabit Ethernet
1696 NetXtreme BCM5782 Gigabit Ethernet
14e4 000d NetXtreme BCM5782 1000Base-T
169c NetXtreme BCM5788 Gigabit Ethernet
16a6 NetXtreme BCM5702 Gigabit Ethernet
0e11 00bb NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T)
1028 0126 BCM5702 1000Base-T
......@@ -5337,6 +5341,8 @@
16c7 NetXtreme BCM5703 Gigabit Ethernet
14e4 0009 NetXtreme BCM5703 1000Base-T
14e4 000a NetXtreme BCM5703 1000Base-SX
170d NetXtreme BCM5901 Gigabit Ethernet
170e NetXtreme BCM5901 Gigabit Ethernet
4210 BCM4210 iLine10 HomePNA 2.0
4211 BCM4211 iLine10 HomePNA 2.0 + V.90 56k modem
4212 BCM4212 v.90 56k modem
......@@ -5877,6 +5883,8 @@
03e8 AC1000 Gigabit Ethernet
03e9 AC1001 Gigabit Ethernet
03ea AC9100 Gigabit Ethernet
173b 0001 AC1002
03eb AC1003 Gigabit Ethernet
1743 Peppercon AG
8139 ROL/F-100 Fast Ethernet Adapter with ROL
174b PC Partner Limited
......
include/linux/ethtool.h
View file @ 32a54d4b
......@@ -257,6 +257,8 @@ u32 ethtool_op_get_link(struct net_device *dev);
u32 ethtool_op_get_tx_csum(struct net_device *dev);
u32 ethtool_op_get_sg(struct net_device *dev);
int ethtool_op_set_sg(struct net_device *dev, u32 data);
u32 ethtool_op_get_tso(struct net_device *dev);
int ethtool_op_set_tso(struct net_device *dev, u32 data);
/**
* &ethtool_ops - Alter and report network device settings
......@@ -284,6 +286,8 @@ int ethtool_op_set_sg(struct net_device *dev, u32 data);
* set_tx_csum: Turn transmit checksums on or off
* get_sg: Report whether scatter-gather is enabled
* set_sg: Turn scatter-gather on or off
* get_tso: Report whether TCP segmentation offload is enabled
* set_tso: Turn TCP segmentation offload on or off
* self_test: Run specified self-tests
* get_strings: Return a set of strings that describe the requested objects
* phys_id: Identify the device
......@@ -337,6 +341,8 @@ struct ethtool_ops {
int (*set_tx_csum)(struct net_device *, u32);
u32 (*get_sg)(struct net_device *);
int (*set_sg)(struct net_device *, u32);
u32 (*get_tso)(struct net_device *);
int (*set_tso)(struct net_device *, u32);
int (*self_test_count)(struct net_device *);
void (*self_test)(struct net_device *, struct ethtool_test *, u64 *);
void (*get_strings)(struct net_device *, u32 stringset, u8 *);
......
include/linux/pci_ids.h
View file @ 32a54d4b
......@@ -1284,6 +1284,9 @@
#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000
#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300
#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320
#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400
#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500
#define PCI_VENDOR_ID_VMIC 0x114a
#define PCI_DEVICE_ID_VMIC_VME 0x7587
......@@ -1768,11 +1771,19 @@
#define PCI_DEVICE_ID_TIGON3_5703 0x1647
#define PCI_DEVICE_ID_TIGON3_5704 0x1648
#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d
#define PCI_DEVICE_ID_TIGON3_5705 0x1653
#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654
#define PCI_DEVICE_ID_TIGON3_5705M 0x165d
#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e
#define PCI_DEVICE_ID_TIGON3_5782 0x1696
#define PCI_DEVICE_ID_TIGON3_5788 0x169c
#define PCI_DEVICE_ID_TIGON3_5702X 0x16a6
#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7
#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8
#define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6
#define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7
#define PCI_DEVICE_ID_TIGON3_5901 0x170d
#define PCI_DEVICE_ID_TIGON3_5901_2 0x170e
#define PCI_DEVICE_ID_BCM4401 0x4401
#define PCI_VENDOR_ID_SYBA 0x1592
......@@ -1800,6 +1811,7 @@
#define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8
#define PCI_DEVICE_ID_ALTIMA_AC1001 0x03e9
#define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea
#define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb
#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
#define PCI_DEVICE_ID_SYMPHONY_101 0x0001
......
net/core/ethtool.c
View file @ 32a54d4b
......@@ -45,6 +45,21 @@ int ethtool_op_set_sg(struct net_device *dev, u32 data)
return 0;
}
u32 ethtool_op_get_tso(struct net_device *dev)
{
return (dev->features & NETIF_F_TSO) != 0;
}
int ethtool_op_set_tso(struct net_device *dev, u32 data)
{
if (data)
dev->features |= NETIF_F_TSO;
else
dev->features &= ~NETIF_F_TSO;
return 0;
}
/* Handlers for each ethtool command */
static int ethtool_get_settings(struct net_device *dev, void *useraddr)
......@@ -454,6 +469,33 @@ static int ethtool_set_sg(struct net_device *dev, char *useraddr)
return dev->ethtool_ops->set_sg(dev, edata.data);
}
static int ethtool_get_tso(struct net_device *dev, char *useraddr)
{
struct ethtool_value edata = { ETHTOOL_GTSO };
if (!dev->ethtool_ops->get_tso)
return -EOPNOTSUPP;
edata.data = dev->ethtool_ops->get_tso(dev);
if (copy_to_user(useraddr, &edata, sizeof(edata)))
return -EFAULT;
return 0;
}
static int ethtool_set_tso(struct net_device *dev, char *useraddr)
{
struct ethtool_value edata;
if (!dev->ethtool_ops->set_tso)
return -EOPNOTSUPP;
if (copy_from_user(&edata, useraddr, sizeof(edata)))
return -EFAULT;
return dev->ethtool_ops->set_tso(dev, edata.data);
}
static int ethtool_self_test(struct net_device *dev, char *useraddr)
{
struct ethtool_test test;
......@@ -653,6 +695,10 @@ int dev_ethtool(struct ifreq *ifr)
return ethtool_get_sg(dev, useraddr);
case ETHTOOL_SSG:
return ethtool_set_sg(dev, useraddr);
case ETHTOOL_GTSO:
return ethtool_get_tso(dev, useraddr);
case ETHTOOL_STSO:
return ethtool_set_tso(dev, useraddr);
case ETHTOOL_TEST:
return ethtool_self_test(dev, useraddr);
case ETHTOOL_GSTRINGS:
......
net/netsyms.c
View file @ 32a54d4b
......@@ -633,5 +633,7 @@ EXPORT_SYMBOL(ethtool_op_get_link);
EXPORT_SYMBOL(ethtool_op_get_tx_csum);
EXPORT_SYMBOL(ethtool_op_get_sg);
EXPORT_SYMBOL(ethtool_op_set_sg);
EXPORT_SYMBOL(ethtool_op_get_tso);
EXPORT_SYMBOL(ethtool_op_set_tso);
#endif /* CONFIG_NET */
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