Commit 35605a10 authored by Yinghai Lu's avatar Yinghai Lu Committed by Ingo Molnar

x86: enable PAT for amd k8 and fam10h

make known_pat_cpu to think amd k8 and fam10h is ok too.

also make tom2 below to be WRBACK
Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 52783fa8
...@@ -37,6 +37,7 @@ static struct fixed_range_block fixed_range_blocks[] = { ...@@ -37,6 +37,7 @@ static struct fixed_range_block fixed_range_blocks[] = {
static unsigned long smp_changes_mask; static unsigned long smp_changes_mask;
static struct mtrr_state mtrr_state = {}; static struct mtrr_state mtrr_state = {};
static int mtrr_state_set; static int mtrr_state_set;
static u64 tom2;
#undef MODULE_PARAM_PREFIX #undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "mtrr." #define MODULE_PARAM_PREFIX "mtrr."
...@@ -138,6 +139,11 @@ u8 mtrr_type_lookup(u64 start, u64 end) ...@@ -138,6 +139,11 @@ u8 mtrr_type_lookup(u64 start, u64 end)
} }
} }
if (tom2) {
if (start >= (1ULL<<32) && (end < tom2))
return MTRR_TYPE_WRBACK;
}
if (prev_match != 0xFF) if (prev_match != 0xFF)
return prev_match; return prev_match;
...@@ -206,6 +212,15 @@ void __init get_mtrr_state(void) ...@@ -206,6 +212,15 @@ void __init get_mtrr_state(void)
mtrr_state.def_type = (lo & 0xff); mtrr_state.def_type = (lo & 0xff);
mtrr_state.enabled = (lo & 0xc00) >> 10; mtrr_state.enabled = (lo & 0xc00) >> 10;
if (amd_special_default_mtrr()) {
unsigned lo, hi;
/* TOP_MEM2 */
rdmsr(MSR_K8_TOP_MEM2, lo, hi);
tom2 = hi;
tom2 <<= 32;
tom2 |= lo;
tom2 &= 0xffffff8000000ULL;
}
if (mtrr_show) { if (mtrr_show) {
int high_width; int high_width;
...@@ -236,6 +251,8 @@ void __init get_mtrr_state(void) ...@@ -236,6 +251,8 @@ void __init get_mtrr_state(void)
else else
printk(KERN_INFO "MTRR %u disabled\n", i); printk(KERN_INFO "MTRR %u disabled\n", i);
} }
if (tom2)
printk(KERN_INFO "TOM2: %016lx aka %ldM\n", tom2, tom2>>20);
} }
mtrr_state_set = 1; mtrr_state_set = 1;
......
...@@ -627,7 +627,7 @@ early_param("disable_mtrr_trim", disable_mtrr_trim_setup); ...@@ -627,7 +627,7 @@ early_param("disable_mtrr_trim", disable_mtrr_trim_setup);
#define Tom2Enabled (1U << 21) #define Tom2Enabled (1U << 21)
#define Tom2ForceMemTypeWB (1U << 22) #define Tom2ForceMemTypeWB (1U << 22)
static __init int amd_special_default_mtrr(void) int __init amd_special_default_mtrr(void)
{ {
u32 l, h; u32 l, h;
......
...@@ -47,6 +47,12 @@ static int pat_known_cpu(void) ...@@ -47,6 +47,12 @@ static int pat_known_cpu(void)
return 1; return 1;
} }
} }
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
boot_cpu_data.x86 >= 0xf && boot_cpu_data.x86 <= 0x11) {
if (cpu_has_pat) {
return 1;
}
}
pat_wc_enabled = 0; pat_wc_enabled = 0;
printk(KERN_INFO "CPU and/or kernel does not support PAT.\n"); printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
......
...@@ -99,6 +99,7 @@ extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi); ...@@ -99,6 +99,7 @@ extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
extern void mtrr_ap_init(void); extern void mtrr_ap_init(void);
extern void mtrr_bp_init(void); extern void mtrr_bp_init(void);
extern int mtrr_trim_uncached_memory(unsigned long end_pfn); extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
extern int amd_special_default_mtrr(void);
# else # else
static inline u8 mtrr_type_lookup(u64 addr, u64 end) static inline u8 mtrr_type_lookup(u64 addr, u64 end)
{ {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment