Commit 36723bfe authored by Borislav Petkov's avatar Borislav Petkov Committed by Ingo Molnar

x86/Kconfig.cpu: make Kconfig help readable in the console

Impact: cleanup

Some lines exceed the 80 char width making them unreadable.
Signed-off-by: default avatarBorislav Petkov <petkovbb@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 48ec4d95
...@@ -167,9 +167,9 @@ config MK7 ...@@ -167,9 +167,9 @@ config MK7
config MK8 config MK8
bool "Opteron/Athlon64/Hammer/K8" bool "Opteron/Athlon64/Hammer/K8"
help help
Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables Select this for an AMD Opteron or Athlon64 Hammer-family processor.
use of some extended instructions, and passes appropriate optimization Enables use of some extended instructions, and passes appropriate
flags to GCC. optimization flags to GCC.
config MCRUSOE config MCRUSOE
bool "Crusoe" bool "Crusoe"
...@@ -256,9 +256,11 @@ config MPSC ...@@ -256,9 +256,11 @@ config MPSC
config MCORE2 config MCORE2
bool "Core 2/newer Xeon" bool "Core 2/newer Xeon"
help help
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
CPUs. You can distinguish newer from older Xeons by the CPU family Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo) 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
(not a typo)
config GENERIC_CPU config GENERIC_CPU
bool "Generic-x86-64" bool "Generic-x86-64"
...@@ -320,14 +322,14 @@ config X86_PPRO_FENCE ...@@ -320,14 +322,14 @@ config X86_PPRO_FENCE
bool "PentiumPro memory ordering errata workaround" bool "PentiumPro memory ordering errata workaround"
depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
help help
Old PentiumPro multiprocessor systems had errata that could cause memory Old PentiumPro multiprocessor systems had errata that could cause
operations to violate the x86 ordering standard in rare cases. Enabling this memory operations to violate the x86 ordering standard in rare cases.
option will attempt to work around some (but not all) occurances of Enabling this option will attempt to work around some (but not all)
this problem, at the cost of much heavier spinlock and memory barrier occurances of this problem, at the cost of much heavier spinlock and
operations. memory barrier operations.
If unsure, say n here. Even distro kernels should think twice before enabling If unsure, say n here. Even distro kernels should think twice before
this: there are few systems, and an unlikely bug. enabling this: there are few systems, and an unlikely bug.
config X86_F00F_BUG config X86_F00F_BUG
def_bool y def_bool y
......
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