Commit 3692fd0a authored by Stefan Schmidt's avatar Stefan Schmidt Committed by Russell King

[ARM] 5091/1: Add missing bitfield include to regs-lcd.h

Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but
the latter is not included.
Also fix one whitespace issue while being there.
Signed-off-by: default avatarAntonio Ospite <ao2@openezx.org>
Signed-off-by: default avatarStefan Schmidt <stefan@datenfreihafen.org>
Acked-by: default avatarEric Miao <eric.miao@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 62cfcf4f
#ifndef __ASM_ARCH_REGS_LCD_H #ifndef __ASM_ARCH_REGS_LCD_H
#define __ASM_ARCH_REGS_LCD_H #define __ASM_ARCH_REGS_LCD_H
#include <asm/arch/bitfield.h>
/* /*
* LCD Controller Registers and Bits Definitions * LCD Controller Registers and Bits Definitions
*/ */
...@@ -69,7 +72,7 @@ ...@@ -69,7 +72,7 @@
#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
#define LCCR0_PDD_S 12 #define LCCR0_PDD_S 12
#define LCCR0_BM (1 << 20) /* Branch mask */ #define LCCR0_BM (1 << 20) /* Branch mask */
#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
#define LCCR0_LCDT (1 << 22) /* LCD panel type */ #define LCCR0_LCDT (1 << 22) /* LCD panel type */
#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment