Commit 36b84128 authored by Graf Yang's avatar Graf Yang Committed by Mike Frysinger

Blackfin: fix MPU handling of invalid memory accesses

The protect_page() function was incorrectly setting up the hardware tables
based on possible access capabilities rather than the actual requested
values.  This means we would grant more access to mmap-ed pages than we
should have.  Once we fix this, we need to tweak the signal generated by
such accesses to aline ourselves with other ports.  This allows the LTP
mmap0{5,6,7} cases to run properly.
Signed-off-by: default avatarGraf Yang <graf.yang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 8fc4dd9e
...@@ -127,17 +127,17 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr, ...@@ -127,17 +127,17 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr,
unsigned long idx = page >> 5; unsigned long idx = page >> 5;
unsigned long bit = 1 << (page & 31); unsigned long bit = 1 << (page & 31);
if (flags & VM_MAYREAD) if (flags & VM_READ)
mask[idx] |= bit; mask[idx] |= bit;
else else
mask[idx] &= ~bit; mask[idx] &= ~bit;
mask += page_mask_nelts; mask += page_mask_nelts;
if (flags & VM_MAYWRITE) if (flags & VM_WRITE)
mask[idx] |= bit; mask[idx] |= bit;
else else
mask[idx] &= ~bit; mask[idx] &= ~bit;
mask += page_mask_nelts; mask += page_mask_nelts;
if (flags & VM_MAYEXEC) if (flags & VM_EXEC)
mask[idx] |= bit; mask[idx] |= bit;
else else
mask[idx] &= ~bit; mask[idx] &= ~bit;
......
...@@ -411,7 +411,7 @@ asmlinkage void trap_c(struct pt_regs *fp) ...@@ -411,7 +411,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
/* 0x23 - Data CPLB protection violation, handled here */ /* 0x23 - Data CPLB protection violation, handled here */
case VEC_CPLB_VL: case VEC_CPLB_VL:
info.si_code = ILL_CPLB_VI; info.si_code = ILL_CPLB_VI;
sig = SIGBUS; sig = SIGSEGV;
strerror = KERN_NOTICE EXC_0x23(KERN_NOTICE); strerror = KERN_NOTICE EXC_0x23(KERN_NOTICE);
CHK_DEBUGGER_TRAP_MAYBE(); CHK_DEBUGGER_TRAP_MAYBE();
break; break;
......
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