Commit 3995f4c5 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

parents 05814450 fe38ea56
......@@ -99,13 +99,6 @@ config ARCH_EBSA110
Ethernet interface, two PCMCIA sockets, two serial ports and a
parallel port.
config ARCH_CAMELOT
bool "Epxa10db"
help
This enables support for Altera's Excalibur XA10 development board.
If you would like to build your kernel to run on one of these boards
then you must say 'Y' here. Otherwise say 'N'
config ARCH_FOOTBRIDGE
bool "FootBridge"
select FOOTBRIDGE
......@@ -213,12 +206,16 @@ config ARCH_AAEC2000
help
This enables support for systems based on the Agilent AAEC-2000
config ARCH_AT91RM9200
bool "AT91RM9200"
help
Say Y here if you intend to run this kernel on an AT91RM9200-based
board.
endchoice
source "arch/arm/mach-clps711x/Kconfig"
source "arch/arm/mach-epxa10db/Kconfig"
source "arch/arm/mach-footbridge/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
......@@ -253,6 +250,8 @@ source "arch/arm/mach-aaec2000/Kconfig"
source "arch/arm/mach-realview/Kconfig"
source "arch/arm/mach-at91rm9200/Kconfig"
# Definitions to make life easier
config ARCH_ACORN
bool
......@@ -418,7 +417,8 @@ config LEDS
ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
ARCH_AT91RM9200
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.
......
......@@ -84,7 +84,6 @@ endif
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_L7200) := l7200
machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
machine-$(CONFIG_ARCH_CAMELOT) := epxa10db
textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
machine-$(CONFIG_ARCH_CLPS711X) := clps711x
machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
......@@ -100,6 +99,7 @@ endif
machine-$(CONFIG_ARCH_H720X) := h720x
machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
ifeq ($(CONFIG_ARCH_EBSA110),y)
# This is what happens if you forget the IOCS16 line.
......
......@@ -21,10 +21,6 @@ ifeq ($(CONFIG_ARCH_SHARK),y)
OBJS += head-shark.o ofw-shark.o
endif
ifeq ($(CONFIG_ARCH_CAMELOT),y)
OBJS += head-epxa10db.o
endif
ifeq ($(CONFIG_ARCH_L7200),y)
OBJS += head-l7200.o
endif
......@@ -50,6 +46,10 @@ ifeq ($(CONFIG_PXA_SHARPSL),y)
OBJS += head-sharpsl.o
endif
ifeq ($(CONFIG_ARCH_AT91RM9200),y)
OBJS += head-at91rm9200.o
endif
ifeq ($(CONFIG_DEBUG_ICEDCC),y)
OBJS += ice-dcc.o
endif
......
/*
* linux/arch/arm/boot/compressed/head-at91rm9200.S
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <asm/mach-types.h>
.section ".start", "ax"
@ Atmel AT91RM9200-DK : 262
mov r3, #(MACH_TYPE_AT91RM9200DK & 0xff)
orr r3, r3, #(MACH_TYPE_AT91RM9200DK & 0xff00)
cmp r7, r3
beq 99f
@ Cogent CSB337 : 399
mov r3, #(MACH_TYPE_CSB337 & 0xff)
orr r3, r3, #(MACH_TYPE_CSB337 & 0xff00)
cmp r7, r3
beq 99f
@ Cogent CSB637 : 648
mov r3, #(MACH_TYPE_CSB637 & 0xff)
orr r3, r3, #(MACH_TYPE_CSB637 & 0xff00)
cmp r7, r3
beq 99f
@ Atmel AT91RM9200-EK : 705
mov r3, #(MACH_TYPE_AT91RM9200EK & 0xff)
orr r3, r3, #(MACH_TYPE_AT91RM9200EK & 0xff00)
cmp r7, r3
beq 99f
@ Conitec Carmeva : 769
mov r3, #(MACH_TYPE_CARMEVA & 0xff)
orr r3, r3, #(MACH_TYPE_CARMEVA & 0xff00)
cmp r7, r3
beq 99f
@ KwikByte KB920x : 612
mov r3, #(MACH_TYPE_KB9200 & 0xff)
orr r3, r3, #(MACH_TYPE_KB9200 & 0xff00)
cmp r7, r3
beq 99f
@ Unknown board, use the AT91RM9200DK board
@ mov r7, #MACH_TYPE_AT91RM9200
mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff)
orr r7, r7, #(MACH_TYPE_AT91RM9200DK & 0xff00)
99:
#include <asm/mach-types.h>
#include <asm/arch/excalibur.h>
.section ".start", "ax"
mov r7, #MACH_TYPE_CAMELOT
......@@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -66,7 +66,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -57,7 +57,6 @@ CONFIG_ARCH_CLPS7500=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -71,7 +71,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -87,7 +87,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
CONFIG_ARCH_EBSA110=y
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -57,7 +57,6 @@ CONFIG_BASE_SMALL=0
CONFIG_ARCH_CLPS711X=y
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y
......
This diff is collapsed.
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
CONFIG_ARCH_FOOTBRIDGE=y
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -57,7 +57,6 @@ CONFIG_BASE_SMALL=0
CONFIG_ARCH_CLPS711X=y
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -60,7 +60,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -66,7 +66,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
CONFIG_ARCH_INTEGRATOR=y
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y
......
......@@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -86,7 +86,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -62,7 +62,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -60,7 +60,6 @@ CONFIG_BASE_SMALL=0
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -60,7 +60,6 @@ CONFIG_BASE_SMALL=0
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -62,7 +62,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -58,7 +58,6 @@ CONFIG_BASE_SMALL=0
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
CONFIG_ARCH_FOOTBRIDGE=y
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -63,7 +63,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -65,7 +65,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -66,7 +66,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -85,7 +85,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -62,7 +62,6 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -66,7 +66,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -58,7 +58,6 @@ CONFIG_BASE_SMALL=0
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -87,7 +87,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -64,7 +64,6 @@ CONFIG_KMOD=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
......
......@@ -710,7 +710,8 @@ int setup_irq(unsigned int irq, struct irqaction *new)
desc->pending = 0;
desc->disable_depth = 1;
if (new->flags & SA_TRIGGER_MASK) {
if (new->flags & SA_TRIGGER_MASK &&
desc->chip->set_type) {
unsigned int type = new->flags & SA_TRIGGER_MASK;
desc->chip->set_type(irq, type);
}
......
if ARCH_AT91RM9200
menu "AT91RM9200 Implementations"
comment "AT91RM9200 Board Type"
config ARCH_AT91RM9200DK
bool "Atmel AT91RM9200-DK Development board"
depends on ARCH_AT91RM9200
help
Select this if you are using Atmel's AT91RM9200-DK Development board
config MACH_AT91RM9200EK
bool "Atmel AT91RM9200-EK Evaluation Kit"
depends on ARCH_AT91RM9200
help
Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit
config MACH_CSB337
bool "Cogent CSB337 board"
depends on ARCH_AT91RM9200
help
Select this if you are using Cogent's CSB337 board
config MACH_CSB637
bool "Cogent CSB637 board"
depends on ARCH_AT91RM9200
help
Select this if you are using Cogent's CSB637 board
config MACH_CARMEVA
bool "Conitec's ARM&EVA"
depends on ARCH_AT91RM9200
help
Select this if you are using Conitec's AT91RM9200-MCU-Module
config MACH_KB9200
bool "KwikByte's KB920x"
depends on ARCH_AT91RM9200
help
Select this if you are using KwikByte's KB920x board
comment "AT91RM9200 Feature Selections"
config AT91_PROGRAMMABLE_CLOCKS
bool "Programmable Clocks"
help
Select this if you need to program one or more of the PCK0..PCK3
programmable clock outputs.
endmenu
endif
#
# Makefile for the linux kernel.
#
obj-y := clock.o irq.o time.o gpio.o common.o devices.o
obj-m :=
obj-n :=
obj- :=
# Board-specific support
#obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
#obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
#obj-$(CONFIG_MACH_CSB337) += board-csb337.o
#obj-$(CONFIG_MACH_CSB637) += board-csb637.o
#obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
#obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
# LEDs support
#led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
#led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
#led-$(CONFIG_MACH_CSB337) += leds.o
#led-$(CONFIG_MACH_CSB637) += leds.o
#led-$(CONFIG_MACH_KB9200) += leds.o
obj-$(CONFIG_LEDS) += $(led-y)
# VGA support
#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
# Note: the following conditions must always be true:
# ZRELADDR == virt_to_phys(TEXTADDR)
# PARAMS_PHYS must be within 4MB of ZRELADDR
# INITRD_PHYS must be in RAM
zreladdr-y := 0x20008000
params_phys-y := 0x20000100
initrd_phys-y := 0x20410000
This diff is collapsed.
/*
* arch/arm/mach-at91rm9200/common.c
*
* Copyright (C) 2005 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <linux/config.h>
#include <linux/module.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/arch/hardware.h>
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
.virtual = AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SPI,
.pfn = __phys_to_pfn(AT91_BASE_SPI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SSC2,
.pfn = __phys_to_pfn(AT91_BASE_SSC2),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SSC1,
.pfn = __phys_to_pfn(AT91_BASE_SSC1),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SSC0,
.pfn = __phys_to_pfn(AT91_BASE_SSC0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_US3,
.pfn = __phys_to_pfn(AT91_BASE_US3),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_US2,
.pfn = __phys_to_pfn(AT91_BASE_US2),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_US1,
.pfn = __phys_to_pfn(AT91_BASE_US1),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_US0,
.pfn = __phys_to_pfn(AT91_BASE_US0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_EMAC,
.pfn = __phys_to_pfn(AT91_BASE_EMAC),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_TWI,
.pfn = __phys_to_pfn(AT91_BASE_TWI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_MCI,
.pfn = __phys_to_pfn(AT91_BASE_MCI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_UDP,
.pfn = __phys_to_pfn(AT91_BASE_UDP),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_TCB1,
.pfn = __phys_to_pfn(AT91_BASE_TCB1),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_TCB0,
.pfn = __phys_to_pfn(AT91_BASE_TCB0),
.length = SZ_16K,
.type = MT_DEVICE,
},
};
void __init at91rm9200_map_io(void)
{
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
}
unsigned long at91_master_clock;
EXPORT_SYMBOL(at91_master_clock);
int at91_serial_map[AT91_NR_UART];
int at91_console_port;
EXPORT_SYMBOL(at91_serial_map);
EXPORT_SYMBOL(at91_console_port);
/*
* arch/arm/mach-at91rm9200/devices.c
*
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
* Copyright (C) 2005 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/config.h>
#include <linux/platform_device.h>
#include <asm/arch/board.h>
#include <asm/arch/pio.h>
/* --------------------------------------------------------------------
* USB Host
* -------------------------------------------------------------------- */
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static u64 ohci_dmamask = 0xffffffffUL;
static struct at91_usbh_data usbh_data;
static struct resource at91rm9200_usbh_resource[] = {
[0] = {
.start = AT91_UHP_BASE,
.end = AT91_UHP_BASE + SZ_1M -1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91_ID_UHP,
.end = AT91_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91rm9200_usbh_device = {
.name = "at91rm9200-ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &usbh_data,
},
.resource = at91rm9200_usbh_resource,
.num_resources = ARRAY_SIZE(at91rm9200_usbh_resource),
};
void __init at91_add_device_usbh(struct at91_usbh_data *data)
{
if (!data)
return;
usbh_data = *data;
platform_device_register(&at91rm9200_usbh_device);
}
#else
void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
#endif
/* --------------------------------------------------------------------
* USB Device (Gadget)
* -------------------------------------------------------------------- */
#ifdef CONFIG_USB_GADGET_AT91
static struct at91_udc_data udc_data;
static struct resource at91_udc_resources[] = {
{
.start = AT91_BASE_UDP,
.end = AT91_BASE_UDP + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91rm9200_udc_device = {
.name = "at91_udc",
.id = -1,
.dev = {
.platform_data = &udc_data,
},
.resource = at91_udc_resources,
.num_resources = ARRAY_SIZE(at91_udc_resources),
};
void __init at91_add_device_udc(struct at91_udc_data *data)
{
if (!data)
return;
if (data->vbus_pin) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
if (data->pullup_pin)
at91_set_gpio_output(data->pullup_pin, 0);
udc_data = *data;
platform_device_register(&at91rm9200_udc_device);
}
#else
void __init at91_add_device_udc(struct at91_udc_data *data) {}
#endif
/* --------------------------------------------------------------------
* Ethernet
* -------------------------------------------------------------------- */
#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
static u64 eth_dmamask = 0xffffffffUL;
static struct at91_eth_data eth_data;
static struct platform_device at91rm9200_eth_device = {
.name = "at91_ether",
.id = -1,
.dev = {
.dma_mask = &eth_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &eth_data,
},
.num_resources = 0,
};
void __init at91_add_device_eth(struct at91_eth_data *data)
{
if (!data)
return;
if (data->phy_irq_pin) {
at91_set_gpio_input(data->phy_irq_pin, 0);
at91_set_deglitch(data->phy_irq_pin, 1);
}
/* Pins used for MII and RMII */
at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
if (!data->is_rmii) {
at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
}
eth_data = *data;
platform_device_register(&at91rm9200_eth_device);
}
#else
void __init at91_add_device_eth(struct at91_eth_data *data) {}
#endif
/* --------------------------------------------------------------------
* Compact Flash / PCMCIA
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
static struct at91_cf_data cf_data;
static struct platform_device at91rm9200_cf_device = {
.name = "at91_cf",
.id = -1,
.dev = {
.platform_data = &cf_data,
},
.num_resources = 0,
};
void __init at91_add_device_cf(struct at91_cf_data *data)
{
if (!data)
return;
/* input/irq */
if (data->irq_pin) {
at91_set_gpio_input(data->irq_pin, 1);
at91_set_deglitch(data->irq_pin, 1);
}
at91_set_gpio_input(data->det_pin, 1);
at91_set_deglitch(data->det_pin, 1);
/* outputs, initially off */
if (data->vcc_pin)
at91_set_gpio_output(data->vcc_pin, 0);
at91_set_gpio_output(data->rst_pin, 0);
cf_data = *data;
platform_device_register(&at91rm9200_cf_device);
}
#else
void __init at91_add_device_cf(struct at91_cf_data *data) {}
#endif
/* --------------------------------------------------------------------
* MMC / SD
* -------------------------------------------------------------------- */
#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
static u64 mmc_dmamask = 0xffffffffUL;
static struct at91_mmc_data mmc_data;
static struct resource at91_mmc_resources[] = {
{
.start = AT91_BASE_MCI,
.end = AT91_BASE_MCI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device at91rm9200_mmc_device = {
.name = "at91rm9200_mci",
.id = -1,
.dev = {
.dma_mask = &mmc_dmamask,
.coherent_dma_mask = 0xffffffff,
.platform_data = &mmc_data,
},
.resource = at91_mmc_resources,
.num_resources = ARRAY_SIZE(at91_mmc_resources),
};
void __init at91_add_device_mmc(struct at91_mmc_data *data)
{
if (!data)
return;
/* input/irq */
if (data->det_pin) {
at91_set_gpio_input(data->det_pin, 1);
at91_set_deglitch(data->det_pin, 1);
}
if (data->wp_pin)
at91_set_gpio_input(data->wp_pin, 1);
/* CLK */
at91_set_A_periph(AT91_PIN_PA27, 0);
if (data->is_b) {
/* CMD */
at91_set_B_periph(AT91_PIN_PA8, 0);
/* DAT0, maybe DAT1..DAT3 */
at91_set_B_periph(AT91_PIN_PA9, 0);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PA10, 0);
at91_set_B_periph(AT91_PIN_PA11, 0);
at91_set_B_periph(AT91_PIN_PA12, 0);
}
} else {
/* CMD */
at91_set_A_periph(AT91_PIN_PA28, 0);
/* DAT0, maybe DAT1..DAT3 */
at91_set_A_periph(AT91_PIN_PA29, 0);
if (data->wire4) {
at91_set_B_periph(AT91_PIN_PB3, 0);
at91_set_B_periph(AT91_PIN_PB4, 0);
at91_set_B_periph(AT91_PIN_PB5, 0);
}
}
mmc_data = *data;
platform_device_register(&at91rm9200_mmc_device);
}
#else
void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
#endif
/* -------------------------------------------------------------------- */
/*
* linux/arch/arm/mach-at91rm9200/generic.h
*
* Copyright (C) 2005 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
void at91_gpio_irq_setup(unsigned banks);
struct sys_timer;
extern struct sys_timer at91rm9200_timer;
extern void __init at91rm9200_map_io(void);
extern int __init at91_clock_init(unsigned long main_clock);
/*
* linux/arch/arm/mach-at91rm9200/gpio.c
*
* Copyright (C) 2005 HP Labs
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/arch/hardware.h>
#include <asm/arch/gpio.h>
static const u32 pio_controller_offset[4] = {
AT91_PIOA,
AT91_PIOB,
AT91_PIOC,
AT91_PIOD,
};
static inline void __iomem *pin_to_controller(unsigned pin)
{
void __iomem *sys_base = (void __iomem *) AT91_VA_BASE_SYS;
pin -= PIN_BASE;
pin /= 32;
if (likely(pin < BGA_GPIO_BANKS))
return sys_base + pio_controller_offset[pin];
return NULL;
}
static inline unsigned pin_to_mask(unsigned pin)
{
pin -= PIN_BASE;
return 1 << (pin % 32);
}
/*--------------------------------------------------------------------------*/
/* Not all hardware capabilities are exposed through these calls; they
* only encapsulate the most common features and modes. (So if you
* want to change signals in groups, do it directly.)
*
* Bootloaders will usually handle some of the pin multiplexing setup.
* The intent is certainly that by the time Linux is fully booted, all
* pins should have been fully initialized. These setup calls should
* only be used by board setup routines, or possibly in driver probe().
*
* For bootloaders doing all that setup, these calls could be inlined
* as NOPs so Linux won't duplicate any setup code
*/
/*
* mux the pin to the "A" internal peripheral role.
*/
int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_ASR);
__raw_writel(mask, pio + PIO_PDR);
return 0;
}
EXPORT_SYMBOL(at91_set_A_periph);
/*
* mux the pin to the "B" internal peripheral role.
*/
int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_BSR);
__raw_writel(mask, pio + PIO_PDR);
return 0;
}
EXPORT_SYMBOL(at91_set_B_periph);
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
* configure it for an input.
*/
int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_ODR);
__raw_writel(mask, pio + PIO_PER);
return 0;
}
EXPORT_SYMBOL(at91_set_gpio_input);
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral),
* and configure it for an output.
*/
int __init_or_module at91_set_gpio_output(unsigned pin, int value)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + PIO_PUDR);
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
__raw_writel(mask, pio + PIO_OER);
__raw_writel(mask, pio + PIO_PER);
return 0;
}
EXPORT_SYMBOL(at91_set_gpio_output);
/*
* enable/disable the glitch filter; mostly used with IRQ handling.
*/
int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
return 0;
}
EXPORT_SYMBOL(at91_set_deglitch);
/*--------------------------------------------------------------------------*/
/*
* assuming the pin is muxed as a gpio output, set its value.
*/
int at91_set_gpio_value(unsigned pin, int value)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
return 0;
}
EXPORT_SYMBOL(at91_set_gpio_value);
/*
* read the pin's value (works even if it's not muxed as a gpio).
*/
int at91_get_gpio_value(unsigned pin)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
u32 pdsr;
if (!pio)
return -EINVAL;
pdsr = __raw_readl(pio + PIO_PDSR);
return (pdsr & mask) != 0;
}
EXPORT_SYMBOL(at91_get_gpio_value);
/*--------------------------------------------------------------------------*/
/* Several AIC controller irqs are dispatched through this GPIO handler.
* To use any AT91_PIN_* as an externally triggered IRQ, first call
* at91_set_gpio_input() then maybe enable its glitch filter.
* Then just request_irq() with the pin ID; it works like any ARM IRQ
* handler, though it always triggers on rising and falling edges.
*
* Alternatively, certain pins may be used directly as IRQ0..IRQ6 after
* configuring them with at91_set_a_periph() or at91_set_b_periph().
* IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
*/
static void gpio_irq_mask(unsigned pin)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (pio)
__raw_writel(mask, pio + PIO_IDR);
}
static void gpio_irq_unmask(unsigned pin)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (pio)
__raw_writel(mask, pio + PIO_IER);
}
static int gpio_irq_type(unsigned pin, unsigned type)
{
return (type == IRQT_BOTHEDGE) ? 0 : -EINVAL;
}
static struct irqchip gpio_irqchip = {
.mask = gpio_irq_mask,
.unmask = gpio_irq_unmask,
.set_type = gpio_irq_type,
};
static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs)
{
unsigned pin;
struct irqdesc *gpio;
void __iomem *pio;
u32 isr;
pio = (void __force __iomem *) desc->chipdata;
/* temporarily mask (level sensitive) parent IRQ */
desc->chip->ack(irq);
for (;;) {
isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
if (!isr)
break;
pin = (unsigned) desc->data;
gpio = &irq_desc[pin];
while (isr) {
if (isr & 1)
gpio->handle(pin, gpio, regs);
pin++;
gpio++;
isr >>= 1;
}
}
desc->chip->unmask(irq);
/* now it may re-trigger */
}
/* call this from board-specific init_irq */
void __init at91_gpio_irq_setup(unsigned banks)
{
unsigned pioc, pin, id;
if (banks > 4)
banks = 4;
for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
pioc < banks;
pioc++, id++) {
void __iomem *controller;
unsigned i;
controller = (void __iomem *) AT91_VA_BASE_SYS + pio_controller_offset[pioc];
__raw_writel(~0, controller + PIO_IDR);
set_irq_data(id, (void *) pin);
set_irq_chipdata(id, (void __force *) controller);
for (i = 0; i < 32; i++, pin++) {
set_irq_chip(pin, &gpio_irqchip);
set_irq_handler(pin, do_simple_IRQ);
set_irq_flags(pin, IRQF_VALID);
}
set_irq_chained_handler(id, gpio_irq_handler);
/* enable the PIO peripheral clock */
at91_sys_write(AT91_PMC_PCER, 1 << id);
}
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
}
/*
* linux/arch/arm/mach-at91rm9200/irq.c
*
* Copyright (C) 2004 SAN People
* Copyright (C) 2004 ATMEL
* Copyright (C) Rick Bronson
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/types.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include "generic.h"
/*
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
7, /* Advanced Interrupt Controller */
7, /* System Peripheral */
0, /* Parallel IO Controller A */
0, /* Parallel IO Controller B */
0, /* Parallel IO Controller C */
0, /* Parallel IO Controller D */
6, /* USART 0 */
6, /* USART 1 */
6, /* USART 2 */
6, /* USART 3 */
0, /* Multimedia Card Interface */
4, /* USB Device Port */
0, /* Two-Wire Interface */
6, /* Serial Peripheral Interface */
5, /* Serial Synchronous Controller */
5, /* Serial Synchronous Controller */
5, /* Serial Synchronous Controller */
0, /* Timer Counter 0 */
0, /* Timer Counter 1 */
0, /* Timer Counter 2 */
0, /* Timer Counter 3 */
0, /* Timer Counter 4 */
0, /* Timer Counter 5 */
3, /* USB Host port */
3, /* Ethernet MAC */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0 /* Advanced Interrupt Controller */
};
static void at91rm9200_mask_irq(unsigned int irq)
{
/* Disable interrupt on AIC */
at91_sys_write(AT91_AIC_IDCR, 1 << irq);
}
static void at91rm9200_unmask_irq(unsigned int irq)
{
/* Enable interrupt on AIC */
at91_sys_write(AT91_AIC_IECR, 1 << irq);
}
static int at91rm9200_irq_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
/* change triggering only for FIQ and external IRQ0..IRQ6 */
if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ))
return -EINVAL;
switch (type) {
case IRQT_HIGH:
srctype = AT91_AIC_SRCTYPE_HIGH;
break;
case IRQT_RISING:
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQT_LOW:
srctype = AT91_AIC_SRCTYPE_LOW;
break;
case IRQT_FALLING:
srctype = AT91_AIC_SRCTYPE_FALLING;
break;
default:
return -EINVAL;
}
smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
return 0;
}
static struct irqchip at91rm9200_irq_chip = {
.ack = at91rm9200_mask_irq,
.mask = at91rm9200_mask_irq,
.unmask = at91rm9200_unmask_irq,
.set_type = at91rm9200_irq_type,
};
/*
* Initialize the AIC interrupt controller.
*/
void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
{
unsigned int i;
/* No priority list specified for this board -> use defaults */
if (priority == NULL)
priority = at91rm9200_default_irq_priority;
/*
* The IVR is used by macro get_irqnr_and_base to read and verify.
* The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
*/
for (i = 0; i < NR_AIC_IRQS; i++) {
/* Put irq number in Source Vector Register: */
at91_sys_write(AT91_AIC_SVR(i), i);
/* Store the Source Mode Register as defined in table above */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
set_irq_chip(i, &at91rm9200_irq_chip);
set_irq_handler(i, do_level_IRQ);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
if (i < 8)
at91_sys_write(AT91_AIC_EOICR, 0);
}
/*
* Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
* When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
*/
at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
/* No debugging in AIC: Debug (Protect) Control Register */
at91_sys_write(AT91_AIC_DCR, 0);
/* Disable and clear all interrupts initially */
at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
}
/*
* linux/arch/arm/mach-at91rm9200/time.c
*
* Copyright (C) 2003 SAN People
* Copyright (C) 2003 ATMEL
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/time.h>
/*
* The ST_CRTR is updated asynchronously to the master clock. It is therefore
* necessary to read it twice (with the same value) to ensure accuracy.
*/
static inline unsigned long read_CRTR(void) {
unsigned long x1, x2;
do {
x1 = at91_sys_read(AT91_ST_CRTR);
x2 = at91_sys_read(AT91_ST_CRTR);
} while (x1 != x2);
return x1;
}
/*
* Returns number of microseconds since last timer interrupt. Note that interrupts
* will have been disabled by do_gettimeofday()
* 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
* 'tick' is usecs per jiffy (linux/timex.h).
*/
static unsigned long at91rm9200_gettimeoffset(void)
{
unsigned long elapsed;
elapsed = (read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV;
return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
}
/*
* IRQ handler for the timer.
*/
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned long rtar;
if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
write_seqlock(&xtime_lock);
do {
timer_tick(regs);
rtar = (at91_sys_read(AT91_ST_RTAR) + LATCH) & AT91_ST_ALMV;
at91_sys_write(AT91_ST_RTAR, rtar);
} while (((read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV) >= LATCH);
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
}
else
return IRQ_NONE; /* not handled */
}
static struct irqaction at91rm9200_timer_irq = {
.name = "at91_tick",
.flags = SA_SHIRQ | SA_INTERRUPT,
.handler = at91rm9200_timer_interrupt
};
/*
* Set up timer interrupt.
*/
void __init at91rm9200_timer_init(void)
{
/* Disable all timer interrupts */
at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
(void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */
/*
* Make IRQs happen for the system timer.
*/
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
/* Set initial alarm to 0 */
at91_sys_write(AT91_ST_RTAR, 0);
/* Real time counter incremented every 30.51758 microseconds */
at91_sys_write(AT91_ST_RTMR, 1);
/* Set Period Interval timer */
at91_sys_write(AT91_ST_PIMR, LATCH);
/* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
/* Enable Period Interval Timer interrupt */
at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
}
struct sys_timer at91rm9200_timer = {
.init = at91rm9200_timer_init,
.offset = at91rm9200_gettimeoffset,
};
if ARCH_CAMELOT
menu "Epxa10db"
comment "PLD hotswap support"
config PLD
bool
default y
config PLD_HOTSWAP
bool "Support for PLD device hotplugging (experimental)"
depends on EXPERIMENTAL
help
This enables support for the dynamic loading and configuration of
compatible drivers when the contents of the PLD are changed. This
is still experimental and requires configuration tools which are
not yet generally available. Say N here. You must enable the kernel
module loader for this feature to work.
endmenu
endif
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y := arch.o irq.o mm.o time.o
obj-m :=
obj-n :=
obj- :=
/*
* linux/arch/arm/mach-epxa10db/arch.c
*
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2001 Altera Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#include <asm/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static struct plat_serial8250_port serial_platform_data[] = {
{
.iobase = 0x3f8,
.irq = IRQ_UARTINT0,
#error FIXME
.uartclk = 0,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{
.iobase = 0x2f8,
.irq = IRQ_UARTINT1,
#error FIXME
.uartclk = 0,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = serial_platform_data,
},
};
extern void epxa10db_map_io(void);
extern void epxa10db_init_irq(void);
extern struct sys_timer epxa10db_timer;
MACHINE_START(CAMELOT, "Altera Epxa10db")
/* Maintainer: Altera Corporation */
.phys_ram = 0x00000000,
.phys_io = 0x7fffc000,
.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
.map_io = epxa10db_map_io,
.init_irq = epxa10db_init_irq,
.timer = &epxa10db_timer,
MACHINE_END
/*
* linux/arch/arm/mach-epxa10db/irq.c
*
* Copyright (C) 2001 Altera Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/stddef.h>
#include <linux/timer.h>
#include <linux/list.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/arch/platform.h>
#include <asm/arch/int_ctrl00.h>
static void epxa_mask_irq(unsigned int irq)
{
writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
}
static void epxa_unmask_irq(unsigned int irq)
{
writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
}
static struct irqchip epxa_irq_chip = {
.ack = epxa_mask_irq,
.mask = epxa_mask_irq,
.unmask = epxa_unmask_irq,
};
static struct resource irq_resource = {
.name = "irq_handler",
.start = IO_ADDRESS(EXC_INT_CTRL00_BASE),
.end = IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4,
};
void __init epxa10db_init_irq(void)
{
unsigned int i;
request_resource(&iomem_resource, &irq_resource);
/*
* This bit sets up the interrupt controller using
* the 6 PLD interrupts mode (the default) each
* irqs is assigned a priority which is the same
* as its interrupt number. This scheme is used because
* its easy, but you may want to change it depending
* on the contents of your PLD
*/
writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
for (i = 0; i < NR_IRQS; i++){
writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i));
set_irq_chip(i,&epxa_irq_chip);
set_irq_handler(i,do_level_IRQ);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
/* Disable all interrupts */
writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
}
/*
* linux/arch/arm/mach-epxa10db/mm.c
*
* MM routines for Altera'a Epxa10db board
*
* Copyright (C) 2001 Altera Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>
#include <asm/page.h>
#include <asm/mach/map.h>
/* Page table mapping for I/O region */
static struct map_desc epxa10db_io_desc[] __initdata = {
{
.virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
.pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
.pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
.pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
.physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
.pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
.pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}
};
void __init epxa10db_map_io(void)
{
iotable_init(epxa10db_io_desc, ARRAY_SIZE(epxa10db_io_desc));
}
/*
* linux/arch/arm/mach-epxa10db/time.c
*
* Copyright (C) 2000 Deep Blue Solutions
* Copyright (C) 2001 Altera Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/leds.h>
#include <asm/mach/time.h>
#define TIMER00_TYPE (volatile unsigned int*)
#include <asm/arch/timer00.h>
static int epxa10db_set_rtc(void)
{
return 1;
}
static int epxa10db_rtc_init(void)
{
set_rtc = epxa10db_set_rtc;
return 0;
}
__initcall(epxa10db_rtc_init);
/*
* IRQ handler for the timer
*/
static irqreturn_t
epxa10db_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
write_seqlock(&xtime_lock);
// ...clear the interrupt
*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))|=TIMER0_CR_CI_MSK;
timer_tick(regs);
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
}
static struct irqaction epxa10db_timer_irq = {
.name = "Excalibur Timer Tick",
.flags = SA_INTERRUPT | SA_TIMER,
.handler = epxa10db_timer_interrupt,
};
/*
* Set up timer interrupt, and return the current time in seconds.
*/
static void __init epxa10db_timer_init(void)
{
/* Start the timer */
*TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200);
*TIMER0_PRESCALE(IO_ADDRESS(EXC_TIMER00_BASE))=1;
*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))=TIMER0_CR_IE_MSK | TIMER0_CR_S_MSK;
setup_irq(IRQ_TIMER0, &epxa10db_timer_irq);
}
struct sys_timer epxa10db_timer = {
.init = epxa10db_timer_init,
};
......@@ -253,100 +253,101 @@ struct clk s3c24xx_uclk = {
/* clock definitions */
static struct clk init_clocks[] = {
{ .name = "nand",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_NAND
},
{ .name = "lcd",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_LCDC
},
{ .name = "usb-host",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBH
},
{ .name = "usb-device",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBD
},
{ .name = "timers",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_PWMT
},
{ .name = "sdi",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SDI
},
{ .name = "uart",
.id = 0,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART0
},
{ .name = "uart",
.id = 1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART1
},
{ .name = "uart",
.id = 2,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART2
},
{ .name = "gpio",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_GPIO
},
{ .name = "rtc",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_RTC
},
{ .name = "adc",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_ADC
},
{ .name = "i2c",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIC
},
{ .name = "iis",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIS
},
{ .name = "spi",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SPI
},
{ .name = "watchdog",
.id = -1,
.parent = &clk_p,
.ctrlbit = 0
{
.name = "nand",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_NAND,
}, {
.name = "lcd",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_LCDC,
}, {
.name = "usb-host",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBH,
}, {
.name = "usb-device",
.id = -1,
.parent = &clk_h,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBD,
}, {
.name = "timers",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_PWMT,
}, {
.name = "sdi",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SDI,
}, {
.name = "uart",
.id = 0,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART0,
}, {
.name = "uart",
.id = 1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART1,
}, {
.name = "uart",
.id = 2,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART2,
}, {
.name = "gpio",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_GPIO,
}, {
.name = "rtc",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_RTC,
}, {
.name = "adc",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_ADC,
}, {
.name = "i2c",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIC,
}, {
.name = "iis",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIS,
}, {
.name = "spi",
.id = -1,
.parent = &clk_p,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SPI,
}, {
.name = "watchdog",
.id = -1,
.parent = &clk_p,
.ctrlbit = 0,
}
};
......@@ -390,16 +391,15 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
clk_p.rate = pclk;
clk_f.rate = fclk;
/* it looks like just setting the register here is not good
* enough, and causes the odd hang at initial boot time, so
* do all of them indivdually.
/* We must be careful disabling the clocks we are not intending to
* be using at boot time, as subsytems such as the LCD which do
* their own DMA requests to the bus can cause the system to lockup
* if they where in the middle of requesting bus access.
*
* I think disabling the LCD clock if the LCD is active is
* very dangerous, and therefore the bootloader should be
* careful to not enable the LCD clock if it is not needed.
*
* and of course, this looks neater
*/
* Disabling the LCD clock if the LCD is active is very dangerous,
* and therefore the bootloader should be careful to not enable
* the LCD clock if it is not needed.
*/
s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);
......
......@@ -62,8 +62,8 @@ config CPU_ARM720T
# ARM920T
config CPU_ARM920T
bool "Support ARM920T processor" if !ARCH_S3C2410
depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000
default y if ARCH_S3C2410
depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
default y if ARCH_S3C2410 || ARCH_AT91RM9200
select CPU_32v4
select CPU_ABRT_EV4T
select CPU_CACHE_V4WT
......@@ -83,8 +83,8 @@ config CPU_ARM920T
# ARM922T
config CPU_ARM922T
bool "Support ARM922T processor" if ARCH_INTEGRATOR
depends on ARCH_CAMELOT || ARCH_LH7A40X || ARCH_INTEGRATOR
default y if ARCH_CAMELOT || ARCH_LH7A40X
depends on ARCH_LH7A40X || ARCH_INTEGRATOR
default y if ARCH_LH7A40X
select CPU_32v4
select CPU_ABRT_EV4T
select CPU_CACHE_V4WT
......
......@@ -86,11 +86,12 @@ remap_area_pmd(pmd_t * pmd, unsigned long address, unsigned long size,
}
static int
remap_area_pages(unsigned long start, unsigned long phys_addr,
remap_area_pages(unsigned long start, unsigned long pfn,
unsigned long size, unsigned long flags)
{
unsigned long address = start;
unsigned long end = start + size;
unsigned long phys_addr = __pfn_to_phys(pfn);
int err = 0;
pgd_t * dir;
......@@ -129,37 +130,45 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
* 'flags' are the extra L_PTE_ flags that you want to specify for this
* mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
*/
void __iomem *
__ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
unsigned long flags)
{
unsigned long addr;
struct vm_struct * area;
area = get_vm_area(size, VM_IOREMAP);
if (!area)
return NULL;
addr = (unsigned long)area->addr;
if (remap_area_pages(addr, pfn, size, flags)) {
vfree(addr);
return NULL;
}
return (void __iomem *) (offset + (char *)addr);
}
EXPORT_SYMBOL(__ioremap_pfn);
void __iomem *
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags)
{
void * addr;
struct vm_struct * area;
unsigned long offset, last_addr;
unsigned long last_addr;
unsigned long offset = phys_addr & ~PAGE_MASK;
unsigned long pfn = __phys_to_pfn(phys_addr);
/* Don't allow wraparound or zero size */
/*
* Don't allow wraparound or zero size
*/
last_addr = phys_addr + size - 1;
if (!size || last_addr < phys_addr)
return NULL;
/*
* Mappings have to be page-aligned
* Page align the mapping size
*/
offset = phys_addr & ~PAGE_MASK;
phys_addr &= PAGE_MASK;
size = PAGE_ALIGN(last_addr + 1) - phys_addr;
/*
* Ok, go for it..
*/
area = get_vm_area(size, VM_IOREMAP);
if (!area)
return NULL;
addr = area->addr;
if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) {
vfree(addr);
return NULL;
}
return (void __iomem *) (offset + (char *)addr);
return __ioremap_pfn(pfn, offset, size, flags);
}
EXPORT_SYMBOL(__ioremap);
......
......@@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Fri Nov 25 14:43:04 2005
# Last update: Mon Jan 9 12:56:42 2006
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
......@@ -910,3 +910,31 @@ mbus MACH_MBUS MBUS 896
nadia2vb MACH_NADIA2VB NADIA2VB 897
r1000 MACH_R1000 R1000 898
hw90250 MACH_HW90250 HW90250 899
omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900
davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901
omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902
olocreek MACH_OLOCREEK OLOCREEK 903
palmz72 MACH_PALMZ72 PALMZ72 904
nxdb500 MACH_NXDB500 NXDB500 905
apf9328 MACH_APF9328 APF9328 906
omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
xscale_treo650 MACH_XSCALE_PALMTREO650 XSCALE_PALMTREO650 909
acumen MACH_ACUMEN ACUMEN 910
xp100 MACH_XP100 XP100 911
fs2410 MACH_FS2410 FS2410 912
pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913
sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914
bsemserver MACH_BSEMSERVER BSEMSERVER 915
netclient MACH_NETCLIENT NETCLIENT 916
xscale_palmtt5 MACH_XSCALE_PALMTT5 XSCALE_PALMTT5 917
xscale_palmtc MACH_OMAP_PALMTC OMAP_PALMTC 918
omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919
argonlvevb MACH_ARGONLVEVB ARGONLVEVB 920
rea_2d MACH_REA_2D REA_2D 921
eti3e524 MACH_TI3E524 TI3E524 922
ateb9200 MACH_ATEB9200 ATEB9200 923
auckland MACH_AUCKLAND AUCKLAND 924
ak3220m MACH_AK3320M AK3320M 925
duramax MACH_DURAMAX DURAMAX 926
n35 MACH_N35 N35 927
......@@ -15,7 +15,6 @@
#include <linux/amba/bus.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#define to_amba_device(d) container_of(d, struct amba_device, dev)
......
......@@ -20,7 +20,6 @@
#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/hardware/sa1111.h>
......
......@@ -473,14 +473,6 @@ config MTD_IXP2000
IXDP425 and Coyote. If you have an IXP2000 based board and
would like to use the flash chips on it, say 'Y'.
config MTD_EPXA10DB
tristate "CFI Flash device mapped on Epxa10db"
depends on MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
help
This enables support for the flash devices on the Altera
Excalibur XA10 Development Board. If you are building a kernel
for on of these boards then you should say 'Y' otherwise say 'N'.
config MTD_FORTUNET
tristate "CFI Flash device mapped on the FortuNet board"
depends on MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
......
......@@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
obj-$(CONFIG_MTD_DC21285) += dc21285.o
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
obj-$(CONFIG_MTD_EPXA10DB) += epxa10db-flash.o
obj-$(CONFIG_MTD_IQ80310) += iq80310.o
obj-$(CONFIG_MTD_L440GX) += l440gx.o
obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
......
/*
* Flash memory access on EPXA based devices
*
* (C) 2000 Nicolas Pitre <nico@cam.org>
* Copyright (C) 2001 Altera Corporation
* Copyright (C) 2001 Red Hat, Inc.
*
* $Id: epxa10db-flash.c,v 1.15 2005/11/07 11:14:27 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/hardware.h>
#ifdef CONFIG_EPXA10DB
#define BOARD_NAME "EPXA10DB"
#else
#define BOARD_NAME "EPXA1DB"
#endif
static int nr_parts = 0;
static struct mtd_partition *parts;
static struct mtd_info *mymtd;
static int epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts);
static struct map_info epxa_map = {
.name = "EPXA flash",
.size = FLASH_SIZE,
.bankwidth = 2,
.phys = FLASH_START,
};
static const char *probes[] = { "RedBoot", "afs", NULL };
static int __init epxa_mtd_init(void)
{
int i;
printk(KERN_NOTICE "%s flash device: 0x%x at 0x%x\n", BOARD_NAME, FLASH_SIZE, FLASH_START);
epxa_map.virt = ioremap(FLASH_START, FLASH_SIZE);
if (!epxa_map.virt) {
printk("Failed to ioremap %s flash\n",BOARD_NAME);
return -EIO;
}
simple_map_init(&epxa_map);
mymtd = do_map_probe("cfi_probe", &epxa_map);
if (!mymtd) {
iounmap((void *)epxa_map.virt);
return -ENXIO;
}
mymtd->owner = THIS_MODULE;
/* Unlock the flash device. */
if(mymtd->unlock){
for (i=0; i<mymtd->numeraseregions;i++){
int j;
for(j=0;j<mymtd->eraseregions[i].numblocks;j++){
mymtd->unlock(mymtd,mymtd->eraseregions[i].offset + j * mymtd->eraseregions[i].erasesize,mymtd->eraseregions[i].erasesize);
}
}
}
#ifdef CONFIG_MTD_PARTITIONS
nr_parts = parse_mtd_partitions(mymtd, probes, &parts, 0);
if (nr_parts > 0) {
add_mtd_partitions(mymtd, parts, nr_parts);
return 0;
}
#endif
/* No recognised partitioning schemes found - use defaults */
nr_parts = epxa_default_partitions(mymtd, &parts);
if (nr_parts > 0) {
add_mtd_partitions(mymtd, parts, nr_parts);
return 0;
}
/* If all else fails... */
add_mtd_device(mymtd);
return 0;
}
static void __exit epxa_mtd_cleanup(void)
{
if (mymtd) {
if (nr_parts)
del_mtd_partitions(mymtd);
else
del_mtd_device(mymtd);
map_destroy(mymtd);
}
if (epxa_map.virt) {
iounmap((void *)epxa_map.virt);
epxa_map.virt = 0;
}
}
/*
* This will do for now, once we decide which bootldr we're finally
* going to use then we'll remove this function and do it properly
*
* Partions are currently (as offsets from base of flash):
* 0x00000000 - 0x003FFFFF - bootloader (!)
* 0x00400000 - 0x00FFFFFF - Flashdisk
*/
static int __init epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts)
{
struct mtd_partition *parts;
int ret, i;
int npartitions = 0;
char *names;
const char *name = "jffs";
printk("Using default partitions for %s\n",BOARD_NAME);
npartitions=1;
parts = kmalloc(npartitions*sizeof(*parts)+strlen(name), GFP_KERNEL);
memzero(parts,npartitions*sizeof(*parts)+strlen(name));
if (!parts) {
ret = -ENOMEM;
goto out;
}
i=0;
names = (char *)&parts[npartitions];
parts[i].name = names;
names += strlen(name) + 1;
strcpy(parts[i].name, name);
#ifdef CONFIG_EPXA10DB
parts[i].size = FLASH_SIZE-0x00400000;
parts[i].offset = 0x00400000;
#else
parts[i].size = FLASH_SIZE-0x00180000;
parts[i].offset = 0x00180000;
#endif
out:
*pparts = parts;
return npartitions;
}
module_init(epxa_mtd_init);
module_exit(epxa_mtd_cleanup);
MODULE_AUTHOR("Clive Davies");
MODULE_DESCRIPTION("Altera epxa mtd flash map");
MODULE_LICENSE("GPL");
......@@ -31,16 +31,3 @@ config ARM_ETHERH
help
If you have an Acorn system with one of these network cards, you
should say Y to this option if you wish to use it with Linux.
config ARM_ETHER00
tristate "Altera Ether00 support"
depends on NET_ETHERNET && ARM && ARCH_CAMELOT
help
This is the driver for Altera's ether00 ethernet mac IP core. Say
Y here if you want to build support for this into the kernel. It
is also available as a module (say M here) that can be inserted/
removed from the kernel at the same time as the PLD is configured.
If this driver is running on an epxa10 development board then it
will generate a suitable hw address based on the board serial
number (MTD support is required for this). Otherwise you will
need to set a suitable hw address using ifconfig.
......@@ -4,7 +4,6 @@
#
obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o
obj-$(CONFIG_ARM_ETHER00) += ether00.o
obj-$(CONFIG_ARM_ETHERH) += etherh.o
obj-$(CONFIG_ARM_ETHER3) += ether3.o
obj-$(CONFIG_ARM_ETHER1) += ether1.o
......@@ -668,9 +668,8 @@ static void __init am79c961_banner(void)
printk(KERN_INFO "%s", version);
}
static int __init am79c961_probe(struct device *_dev)
static int __init am79c961_probe(struct platform_device *pdev)
{
struct platform_device *pdev = to_platform_device(_dev);
struct resource *res;
struct net_device *dev;
struct dev_priv *priv;
......@@ -758,15 +757,16 @@ static int __init am79c961_probe(struct device *_dev)
return ret;
}
static struct device_driver am79c961_driver = {
.name = "am79c961",
.bus = &platform_bus_type,
static struct platform_driver am79c961_driver = {
.probe = am79c961_probe,
.driver = {
.name = "am79c961",
},
};
static int __init am79c961_init(void)
{
return driver_register(&am79c961_driver);
return platform_driver_register(&am79c961_driver);
}
__initcall(am79c961_init);
This diff is collapsed.
......@@ -69,7 +69,6 @@
#include <asm/system.h>
#include <asm/ecard.h>
#include <asm/io.h>
#include <asm/irq.h>
static char version[] __initdata = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n";
......
......@@ -50,7 +50,6 @@
#include <asm/system.h>
#include <asm/ecard.h>
#include <asm/io.h>
#include <asm/irq.h>
#include "../8390.h"
......
......@@ -146,7 +146,6 @@
#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ecard.h>
#include "../scsi.h"
......
......@@ -33,7 +33,6 @@
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ecard.h>
#include "../scsi.h"
......
......@@ -13,7 +13,6 @@
#include <asm/ecard.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include "../scsi.h"
......
......@@ -31,7 +31,6 @@
#include <asm/dma.h>
#include <asm/ecard.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include "../scsi.h"
......
......@@ -35,7 +35,6 @@
#include <linux/dma-mapping.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dma.h>
#include <asm/ecard.h>
#include <asm/pgtable.h>
......
......@@ -22,7 +22,6 @@
#include <asm/dma.h>
#include <asm/ecard.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include "../scsi.h"
......
......@@ -369,29 +369,6 @@ config SERIAL_21285_CONSOLE
your boot loader (lilo or loadlin) about how to pass options to the
kernel at boot time.)
config SERIAL_UART00
bool "Excalibur serial port (uart00) support"
depends on ARM && ARCH_CAMELOT
select SERIAL_CORE
help
Say Y here if you want to use the hard logic uart on Excalibur. This
driver also supports soft logic implementations of this uart core.
config SERIAL_UART00_CONSOLE
bool "Support for console on Excalibur serial port"
depends on SERIAL_UART00
select SERIAL_CORE_CONSOLE
help
Say Y here if you want to support a serial console on an Excalibur
hard logic uart or uart00 IP core.
Even if you say Y here, the currently visible virtual console
(/dev/tty0) will still be used as the system console by default, but
you can alter that using a kernel command line option such as
"console=ttyS1". (Try "man bootparam" or see the documentation of
your boot loader (lilo or loadlin) about how to pass options to the
kernel at boot time.)
config SERIAL_MPSC
bool "Marvell MPSC serial port support"
depends on PPC32 && MV64X60
......
......@@ -29,7 +29,6 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
obj-$(CONFIG_SERIAL_PXA) += pxa.o
obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
obj-$(CONFIG_SERIAL_UART00) += uart00.o
obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o
obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o
obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
......
This diff is collapsed.
......@@ -50,7 +50,6 @@
#include <linux/init.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/uaccess.h>
......
......@@ -178,7 +178,6 @@
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>
#include <asm/arch/assabet.h>
......@@ -1455,7 +1454,11 @@ static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev)
static int __init sa1100fb_probe(struct platform_device *pdev)
{
struct sa1100fb_info *fbi;
int ret;
int ret, irq;
irq = platform_get_irq(pdev, 0);
if (irq <= 0)
return -EINVAL;
if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
return -EBUSY;
......@@ -1470,7 +1473,7 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
if (ret)
goto failed;
ret = request_irq(IRQ_LCD, sa1100fb_handle_irq, SA_INTERRUPT,
ret = request_irq(irq, sa1100fb_handle_irq, SA_INTERRUPT,
"LCD", fbi);
if (ret) {
printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret);
......@@ -1492,7 +1495,7 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
ret = register_framebuffer(&fbi->fb);
if (ret < 0)
goto failed;
goto err_free_irq;
#ifdef CONFIG_CPU_FREQ
fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
......@@ -1504,7 +1507,9 @@ static int __init sa1100fb_probe(struct platform_device *pdev)
/* This driver cannot be unloaded at the moment */
return 0;
failed:
err_free_irq:
free_irq(irq, fbi);
failed:
platform_set_drvdata(pdev, NULL);
kfree(fbi);
release_mem_region(0xb0100000, 0x10000);
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment