Commit 3d25802e authored by Jesse Barnes's avatar Jesse Barnes Committed by Linus Torvalds

DRM/i915: only use tiled blits on 965+

When scheduled swaps occur, we need to blit between front & back
buffers.  If the buffers are tiled, we need to set the appropriate
XY_SRC_COPY tile bit, but only on 965 chips, since it will cause
corruption on pre-965 (e.g. 945).

Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Acked-by: default avatarDave Airlie <airlied@linux.ie>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 83680cdb
...@@ -62,11 +62,11 @@ static void i915_vblank_tasklet(struct drm_device *dev) ...@@ -62,11 +62,11 @@ static void i915_vblank_tasklet(struct drm_device *dev)
u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
RING_LOCALS; RING_LOCALS;
if (sarea_priv->front_tiled) { if (IS_I965G(dev) && sarea_priv->front_tiled) {
cmd |= XY_SRC_COPY_BLT_DST_TILED; cmd |= XY_SRC_COPY_BLT_DST_TILED;
dst_pitch >>= 2; dst_pitch >>= 2;
} }
if (sarea_priv->back_tiled) { if (IS_I965G(dev) && sarea_priv->back_tiled) {
cmd |= XY_SRC_COPY_BLT_SRC_TILED; cmd |= XY_SRC_COPY_BLT_SRC_TILED;
src_pitch >>= 2; src_pitch >>= 2;
} }
......
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