Commit 3d50b59a authored by Jitao Shi's avatar Jitao Shi Committed by Chun-Kuang Hu

drm/mediatek: add the mipitx driving control

Add a property in device tree to control the driving by different
board.
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarJitao Shi <jitao.shi@mediatek.com>
Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 6d3a4aef
...@@ -125,6 +125,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) ...@@ -125,6 +125,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev)
return ret; return ret;
} }
ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",
&mipi_tx->mipitx_drive);
/* If can't get the "mipi_tx->mipitx_drive", set it default 0x8 */
if (ret < 0)
mipi_tx->mipitx_drive = 4600;
/* check the mipitx_drive valid */
if (mipi_tx->mipitx_drive > 6000 || mipi_tx->mipitx_drive < 3000) {
dev_warn(dev, "drive-strength-microamp is invalid %d, not in 3000 ~ 6000\n",
mipi_tx->mipitx_drive);
mipi_tx->mipitx_drive = clamp_val(mipi_tx->mipitx_drive, 3000,
6000);
}
ref_clk_name = __clk_get_name(ref_clk); ref_clk_name = __clk_get_name(ref_clk);
ret = of_property_read_string(dev->of_node, "clock-output-names", ret = of_property_read_string(dev->of_node, "clock-output-names",
......
...@@ -27,6 +27,7 @@ struct mtk_mipi_tx { ...@@ -27,6 +27,7 @@ struct mtk_mipi_tx {
struct device *dev; struct device *dev;
void __iomem *regs; void __iomem *regs;
u32 data_rate; u32 data_rate;
u32 mipitx_drive;
const struct mtk_mipitx_data *driver_data; const struct mtk_mipitx_data *driver_data;
struct clk_hw pll_hw; struct clk_hw pll_hw;
struct clk *pll; struct clk *pll;
......
...@@ -17,6 +17,9 @@ ...@@ -17,6 +17,9 @@
#define RG_DSI_BG_CORE_EN BIT(7) #define RG_DSI_BG_CORE_EN BIT(7)
#define RG_DSI_PAD_TIEL_SEL BIT(8) #define RG_DSI_PAD_TIEL_SEL BIT(8)
#define MIPITX_VOLTAGE_SEL 0x0010
#define RG_DSI_HSTX_LDO_REF_SEL (0xf << 6)
#define MIPITX_PLL_PWR 0x0028 #define MIPITX_PLL_PWR 0x0028
#define MIPITX_PLL_CON0 0x002c #define MIPITX_PLL_CON0 0x002c
#define MIPITX_PLL_CON1 0x0030 #define MIPITX_PLL_CON1 0x0030
...@@ -123,6 +126,10 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy) ...@@ -123,6 +126,10 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy)
mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_D3_SW_CTL_EN, DSI_SW_CTL_EN); mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_D3_SW_CTL_EN, DSI_SW_CTL_EN);
mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_CK_SW_CTL_EN, DSI_SW_CTL_EN); mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_CK_SW_CTL_EN, DSI_SW_CTL_EN);
mtk_mipi_tx_update_bits(mipi_tx, MIPITX_VOLTAGE_SEL,
RG_DSI_HSTX_LDO_REF_SEL,
(mipi_tx->mipitx_drive - 3000) / 200 << 6);
mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN); mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);
} }
......
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