Commit 3da68f50 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Input_Select_Reg()

The "Input Select" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent cc7a164b
...@@ -393,7 +393,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) ...@@ -393,7 +393,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
regs[NITIO_LOADB_REG(counter->counter_index)], regs[NITIO_LOADB_REG(counter->counter_index)],
NITIO_LOADB_REG(counter->counter_index)); NITIO_LOADB_REG(counter->counter_index));
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), ~0, NITIO_INPUT_SEL_REG(counter->counter_index), ~0,
0); 0);
if (ni_tio_counting_mode_registers_present(counter_dev)) { if (ni_tio_counting_mode_registers_present(counter_dev)) {
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
...@@ -533,7 +533,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode) ...@@ -533,7 +533,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
if (mode & NI_GPCT_INVERT_OUTPUT_BIT) if (mode & NI_GPCT_INVERT_OUTPUT_BIT)
input_select_bits |= Gi_Output_Polarity_Bit; input_select_bits |= Gi_Output_Polarity_Bit;
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit | Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit |
Gi_Output_Polarity_Bit, input_select_bits); Gi_Output_Polarity_Bit, input_select_bits);
...@@ -767,7 +767,7 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter, ...@@ -767,7 +767,7 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter,
if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT) if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT)
input_select_bits |= Gi_Source_Polarity_Bit; input_select_bits |= Gi_Source_Polarity_Bit;
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Source_Select_Mask | Gi_Source_Polarity_Bit, Gi_Source_Select_Mask | Gi_Source_Polarity_Bit,
input_select_bits); input_select_bits);
ni_tio_set_source_subselect(counter, clock_source); ni_tio_set_source_subselect(counter, clock_source);
...@@ -813,7 +813,7 @@ static unsigned ni_tio_clock_src_modifiers(const struct ni_gpct *counter) ...@@ -813,7 +813,7 @@ static unsigned ni_tio_clock_src_modifiers(const struct ni_gpct *counter)
unsigned bits = 0; unsigned bits = 0;
if (ni_tio_get_soft_copy(counter, if (ni_tio_get_soft_copy(counter,
NITIO_Gi_Input_Select_Reg NITIO_INPUT_SEL_REG
(counter->counter_index)) & (counter->counter_index)) &
Gi_Source_Polarity_Bit) Gi_Source_Polarity_Bit)
bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT; bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT;
...@@ -832,7 +832,7 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter) ...@@ -832,7 +832,7 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
unsigned clock_source = 0; unsigned clock_source = 0;
unsigned i; unsigned i;
const unsigned input_select = (ni_tio_get_soft_copy(counter, const unsigned input_select = (ni_tio_get_soft_copy(counter,
NITIO_Gi_Input_Select_Reg NITIO_INPUT_SEL_REG
(counter->counter_index)) (counter->counter_index))
& Gi_Source_Select_Mask) >> & Gi_Source_Select_Mask) >>
Gi_Source_Select_Shift; Gi_Source_Select_Shift;
...@@ -897,7 +897,7 @@ static unsigned ni_660x_clock_src_select(const struct ni_gpct *counter) ...@@ -897,7 +897,7 @@ static unsigned ni_660x_clock_src_select(const struct ni_gpct *counter)
unsigned clock_source = 0; unsigned clock_source = 0;
unsigned i; unsigned i;
const unsigned input_select = (ni_tio_get_soft_copy(counter, const unsigned input_select = (ni_tio_get_soft_copy(counter,
NITIO_Gi_Input_Select_Reg NITIO_INPUT_SEL_REG
(counter->counter_index)) (counter->counter_index))
& Gi_Source_Select_Mask) >> & Gi_Source_Select_Mask) >>
Gi_Source_Select_Shift; Gi_Source_Select_Shift;
...@@ -1076,7 +1076,7 @@ static int ni_660x_set_first_gate(struct ni_gpct *counter, ...@@ -1076,7 +1076,7 @@ static int ni_660x_set_first_gate(struct ni_gpct *counter,
break; break;
} }
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Mask, Gi_Gate_Select_Mask,
Gi_Gate_Select_Bits(ni_660x_gate_select)); Gi_Gate_Select_Bits(ni_660x_gate_select));
return 0; return 0;
...@@ -1125,7 +1125,7 @@ static int ni_m_series_set_first_gate(struct ni_gpct *counter, ...@@ -1125,7 +1125,7 @@ static int ni_m_series_set_first_gate(struct ni_gpct *counter,
break; break;
} }
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Mask, Gi_Gate_Select_Mask,
Gi_Gate_Select_Bits(ni_m_series_gate_select)); Gi_Gate_Select_Bits(ni_m_series_gate_select));
return 0; return 0;
...@@ -1507,7 +1507,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index, ...@@ -1507,7 +1507,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
} else { } else {
gate_select_bits = gate_select_bits =
(ni_tio_get_soft_copy(counter, (ni_tio_get_soft_copy(counter,
NITIO_Gi_Input_Select_Reg NITIO_INPUT_SEL_REG
(counter->counter_index)) & (counter->counter_index)) &
Gi_Gate_Select_Mask) >> Gi_Gate_Select_Shift; Gi_Gate_Select_Mask) >> Gi_Gate_Select_Shift;
} }
......
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x)) #define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x))
#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x)) #define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x)) #define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
#define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x))
static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx) static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
{ {
...@@ -43,21 +44,6 @@ static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx) ...@@ -43,21 +44,6 @@ static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Input_Select_Reg(unsigned idx)
{
switch (idx) {
case 0:
return NITIO_G0_INPUT_SEL;
case 1:
return NITIO_G1_INPUT_SEL;
case 2:
return NITIO_G2_INPUT_SEL;
case 3:
return NITIO_G3_INPUT_SEL;
}
return 0;
}
static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx) static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
{ {
switch (idx) { switch (idx) {
......
...@@ -66,7 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, ...@@ -66,7 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
input_select_bits |= Gi_Write_Acknowledges_Irq; input_select_bits |= Gi_Write_Acknowledges_Irq;
} }
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index), NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq, Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
input_select_bits); input_select_bits);
switch (counter_dev->variant) { switch (counter_dev->variant) {
......
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